[PATCH] D42088: [x86] shrink 'and' immediate values by setting the high bits (PR35907)
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 18 07:52:55 PST 2018
spatel updated this revision to Diff 130411.
spatel added a comment.
Patch updated:
1. Use DAG.MaskedValueIsZero() to make the code cleaner.
2. Move the check for shrinkability ahead of the more expensive call to compute known bits.
3. Check for a -1 'and' mask. In this case, replace and return. Don't create an unnecessary constant and don't select out-of-turn. Allow the normal selection sequence to continue.
Thinking about this some more -- and as we mentioned in https://reviews.llvm.org/D42090 -- I don't think it's possible to guarantee that we never see a dead 'and' op here in selection. We don't run DAGCombine to fix-point, so nothing is certain.
So even though we could try to fix the cases seen in the regression tests upstream from here, it won't prevent needing to handle the case of a -1 mask. Thus, I've added code for that situation to avoid unexpected selection behavior.
We could still move this over to PreprocessISelDAG() if that seems better.
https://reviews.llvm.org/D42088
Files:
lib/Target/X86/X86ISelDAGToDAG.cpp
test/CodeGen/X86/and-encoding.ll
test/CodeGen/X86/divide-by-constant.ll
test/CodeGen/X86/known-bits.ll
test/CodeGen/X86/popcnt.ll
test/CodeGen/X86/pr33844.ll
test/CodeGen/X86/shift-pair.ll
test/CodeGen/X86/urem-i8-constant.ll
test/CodeGen/X86/vector-sext.ll
test/CodeGen/X86/win64_frame.ll
test/CodeGen/X86/x86-64-baseptr.ll
test/CodeGen/X86/zext-fold.ll
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