[PATCH] D42230: [CGP] Fix the GV handling in complex addressing mode

[Serguei Katkov via Phabricator via llvm-commits]

skatkov created this revision.
skatkov added reviewers: john.brawn, reames, santosh.

If in complex addressing mode the difference is in GV then
base reg should not be installed because we plan to use
base reg as a merge point of different GVs.


https://reviews.llvm.org/D42230

Files:
  lib/CodeGen/CodeGenPrepare.cpp
  test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll


Index: test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
===================================================================
--- test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
+++ test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
@@ -1,6 +1,7 @@
 ; RUN: opt -S -codegenprepare -disable-complex-addr-modes=false -addr-sink-new-select=true  %s | FileCheck %s --check-prefix=CHECK
-target datalayout =
-"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+;target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+;target triple = "x86_64-unknown-linux-gnu"
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 ; Select when both offset and scale reg are present.
@@ -17,3 +18,18 @@
   ret i64 %v
 }
 
+ at gv1 = external global i8, align 16
+ at gv2 = external global i8, align 16
+
+; Select when both GV and base reg are present.
+define i8 @test2(i1 %c, i64 %b) {
+; CHECK-LABEL: @test2
+entry:
+; CHECK-LABEL: entry:
+  %g1 = getelementptr inbounds i8, i8* @gv1, i64 %b
+  %g2 = getelementptr inbounds i8, i8* @gv2, i64 %b
+  %s = select i1 %c, i8* %g1, i8* %g2
+; CHECK-NOT: sunkaddr
+  %v = load i8 , i8* %s, align 8
+  ret i8 %v
+}
Index: lib/CodeGen/CodeGenPrepare.cpp
===================================================================
--- lib/CodeGen/CodeGenPrepare.cpp
+++ lib/CodeGen/CodeGenPrepare.cpp
@@ -2703,10 +2703,14 @@
     // We also must reject the case when base offset is different and
     // scale reg is not null, we cannot handle this case due to merge of
     // different offsets will be used as ScaleReg.
+    // We also must reject the case when GV is different and BaseReg installed
+    // due to we want to use base reg as a merge of GV values.
     if (DifferentField != ExtAddrMode::MultipleFields &&
         DifferentField != ExtAddrMode::ScaleField &&
         (DifferentField != ExtAddrMode::BaseOffsField ||
-         !NewAddrMode.ScaledReg)) {
+         !NewAddrMode.ScaledReg) &&
+        (DifferentField != ExtAddrMode::BaseGVField ||
+         !NewAddrMode.HasBaseReg)) {
       AddrModes.emplace_back(NewAddrMode);
       return true;
     }


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