[PATCH] D39912: AMDGPU/SI: Implement d16 support for image intrinsics

Changpeng Fang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 17 10:04:41 PST 2018


cfang added inline comments.


================
Comment at: lib/Target/AMDGPU/MIMGInstructions.td:322-331
+    def _V1 : MIMG_Gather_Helper <op, asm, dst_rc, VGPR_32, wqm>,
+              MIMG_Mask<asm#"_V1", channels>;
+    def _V2 : MIMG_Gather_Helper <op, asm, dst_rc, VReg_64, wqm>,
+              MIMG_Mask<asm#"_V2", channels>;
+    def _V4 : MIMG_Gather_Helper <op, asm, dst_rc, VReg_128, wqm>,
+              MIMG_Mask<asm#"_V4", channels>;
+    def _V8 : MIMG_Gather_Helper <op, asm, dst_rc, VReg_256, wqm>,
----------------
arsenm wrote:
> These are all the same within each block, so you can introduce another multiclass rather than repeating the same combintions. Same for the other MIMG types
Do you mean the following defs are the same in different block?  I have difficulty in the name mangling to attch "_D16" and "_D16_gfx80" is the def. Can you please advice? Thanks.

  def _V1 : MIMG_Gather_Helper <op, asm, dst_rc, VGPR_32, wqm>,
              MIMG_Mask<asm#"_V1", channels>;

 def _V1_D16 : MIMG_Gather_Helper <op, asm, dst_rc, VGPR_32, wqm, 1>,
                MIMG_Mask<asm#"_V1_D16", channels>;


https://reviews.llvm.org/D39912





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