[PATCH] D39912: AMDGPU/SI: Implement d16 support for image intrinsics
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 17 08:03:50 PST 2018
arsenm added inline comments.
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Comment at: lib/Target/AMDGPU/MIMGInstructions.td:181
let DisableDecoder = DisableSIDecoder;
+ let d16 = 0;
}
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This should be the default anyway, so you shouldn't need to 0 it again
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Comment at: lib/Target/AMDGPU/MIMGInstructions.td:322-331
+ def _V1 : MIMG_Gather_Helper <op, asm, dst_rc, VGPR_32, wqm>,
+ MIMG_Mask<asm#"_V1", channels>;
+ def _V2 : MIMG_Gather_Helper <op, asm, dst_rc, VReg_64, wqm>,
+ MIMG_Mask<asm#"_V2", channels>;
+ def _V4 : MIMG_Gather_Helper <op, asm, dst_rc, VReg_128, wqm>,
+ MIMG_Mask<asm#"_V4", channels>;
+ def _V8 : MIMG_Gather_Helper <op, asm, dst_rc, VReg_256, wqm>,
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These are all the same within each block, so you can introduce another multiclass rather than repeating the same combintions. Same for the other MIMG types
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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:3507
+static unsigned getImageOpcode (unsigned IID) {
+ switch (IID) {
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Extra space before (
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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:3508-3509
+static unsigned getImageOpcode (unsigned IID) {
+ switch (IID) {
+ case Intrinsic::amdgcn_image_load :
+ return AMDGPUISD::IMAGE_LOAD;
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Indentation off
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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:3658
+
+ default: break;
+ }
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newline
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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:3742
+ };
+ unsigned Opc = getImageOpcode (IID);
+ Res = DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, M->getMemoryVT(),
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Extra space before (
https://reviews.llvm.org/D39912
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