[PATCH] D41651: AMDGPU: Add 32-bit constant address space

[Matt Arsenault via Phabricator via llvm-commits]

arsenm requested changes to this revision.
arsenm added a comment.
This revision now requires changes to proceed.

This needs to update AMDGPUAliasAnalysis. Also needs more test coverage. I don't see this testing unaligned access or some of the other places it was added.

This part is problematic:
"Only scalar loads support 32-bit pointers. An address in a VGPR will fail to compile."
"https://reviews.llvm.org/D41715 (amdgpu.uniform on loads) is required for enforce scalar loads in some cases."

We can't rely on metadata to be able to compile



================
Comment at: lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:1447
+  const SDValue Ops[] = {
+    CurDAG->getTargetConstant(AMDGPU::SReg_64RegClassID, SL, MVT::i32),
+    Addr,
----------------
I think this needs to be _XEXEC


https://reviews.llvm.org/D41651