[PATCH] D41382: [AArch64] Asm: Fix parsing of register aliases that have a name starting with 'z'
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 19 05:57:47 PST 2017
sdesmalen added inline comments.
================
Comment at: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:2010
+ // tryParse methods for SVE data and predicate vectors.
+ if (AArch64MCRegisterClasses[AArch64::ZPRRegClassID].contains(RegNum))
return -1;
----------------
fhahn wrote:
> fhahn wrote:
> > I don't think we need this early exit here. If it's a vector register, `matchRegisterNameAlias` should return 0 and we return -1 later. We do not bail out for NEON early either.
> Ok, I was wrong about `matchRegisterNameAlias`. But it seems the early exit is not needed, the MC test pass for me without it and we do not have a similar case for NEON.
This was added to enable the other test, where the alias is a vector register (that needs custom parsing), e.g.:
peter .req z6
add peter.s, z0.s, z0.s
However, in that case it seems wrong for 'matchRegisterNameAlias(..., RegKind::Scalar) to return the register number of an SVE vector. This is caused by MatchRegisterName() being generic to work for non-scalar registers as well, so I'll fix this.
https://reviews.llvm.org/D41382
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