[PATCH] D41323: [X86][SSE] Add cpu feature for aggressive combining to variable shuffles
Zvi Rackover via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 18 09:58:58 PST 2017
zvi added a comment.
Here's the full list of tests that are affected by setting AllowVariableMask for Depth=2. I think that we should have the full list covered with the new configuration.
I would be happy to assist with the work involved.
CodeGen/X86/avx-intrinsics-fast-isel.ll
CodeGen/X86/avx-splat.ll
CodeGen/X86/avx2-conversions.ll
CodeGen/X86/avx2-vector-shifts.ll
CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll
CodeGen/X86/avx512-shuffles/partial_permute.ll
CodeGen/X86/avx512-trunc.ll
CodeGen/X86/bitcast-and-setcc-512.ll
CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
CodeGen/X86/bitcast-int-to-vector-bool.ll
CodeGen/X86/cast-vsel.ll
CodeGen/X86/combine-or.ll
CodeGen/X86/combine-shl.ll
CodeGen/X86/combine-sra.ll
CodeGen/X86/combine-srl.ll
CodeGen/X86/insertelement-duplicates.ll
CodeGen/X86/insertelement-zero.ll
CodeGen/X86/known-signbits-vector.ll
CodeGen/X86/merge-consecutive-loads-128.ll
CodeGen/X86/oddshuffles.ll
CodeGen/X86/psubus.ll
CodeGen/X86/reduce-trunc-shl.ll
CodeGen/X86/select.ll
CodeGen/X86/shuffle-of-splat-multiuses.ll
CodeGen/X86/shuffle-strided-with-offset-128.ll
CodeGen/X86/shuffle-strided-with-offset-256.ll
CodeGen/X86/shuffle-strided-with-offset-512.ll
CodeGen/X86/shuffle-vs-trunc-128.ll
CodeGen/X86/shuffle-vs-trunc-256.ll
CodeGen/X86/shuffle-vs-trunc-512.ll
CodeGen/X86/sse41.ll
CodeGen/X86/swizzle-2.ll
CodeGen/X86/trunc-ext-ld-st.ll
CodeGen/X86/vec_cast2.ll
CodeGen/X86/vec_insert-5.ll
CodeGen/X86/vec_insert-mmx.ll
CodeGen/X86/vec_set-3.ll
CodeGen/X86/vec_trunc_sext.ll
CodeGen/X86/vector-compare-results.ll
CodeGen/X86/vector-half-conversions.ll
CodeGen/X86/vector-rotate-128.ll
CodeGen/X86/vector-rotate-256.ll
CodeGen/X86/vector-sext.ll
CodeGen/X86/vector-shuffle-128-v16.ll
CodeGen/X86/vector-shuffle-128-v4.ll
CodeGen/X86/vector-shuffle-128-v8.ll
Repository:
rL LLVM
https://reviews.llvm.org/D41323
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