[PATCH] D41323: [X86][SSE] Add cpu feature for aggressive combining to variable shuffles

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon updated this revision to Diff 127366.
RKSimon added a comment.

Added slow/fast passes for AVX2/AVX512 shuffle lowering tests - did this for v8i16/v16i8 and all 256-bit types as these have useful tests to show the diffs. I can add them for the others if you wish but these will mostly not cause any codegen diffs.


Repository:
  rL LLVM

https://reviews.llvm.org/D41323

Files:
  lib/Target/X86/X86.td
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86Subtarget.h
  test/CodeGen/X86/vector-shuffle-128-v16.ll
  test/CodeGen/X86/vector-shuffle-128-v8.ll
  test/CodeGen/X86/vector-shuffle-256-v16.ll
  test/CodeGen/X86/vector-shuffle-256-v32.ll
  test/CodeGen/X86/vector-shuffle-256-v4.ll
  test/CodeGen/X86/vector-shuffle-256-v8.ll
  test/CodeGen/X86/vector-shuffle-512-v32.ll

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