[PATCH] D41350: [DAGCombine] Improve ReduceLoadWidth for SRL

Mon Dec 18 07:29:58 PST 2017

niravd added a comment.

All of the current tests look good to me.  I think you should add some tests for non-byte shifts.

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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:3793
+  // this isn't going to produce an unsupported unaligned access.
+  if (ShAmt && !TLI.allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(),
+                                       ExtVT, LoadN->getAddressSpace(),
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What if ShAmt isn't a multiple of 8? 

https://reviews.llvm.org/D41350