[llvm] r320260 - [X86] Don't use getTargetConstant for all 0s and all 1s mask vector.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Dec 9 11:18:30 PST 2017
Author: ctopper
Date: Sat Dec 9 11:18:30 2017
New Revision: 320260
URL: http://llvm.org/viewvc/llvm-project?rev=320260&view=rev
Log:
[X86] Don't use getTargetConstant for all 0s and all 1s mask vector.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=320260&r1=320259&r2=320260&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Dec 9 11:18:30 2017
@@ -7065,10 +7065,10 @@ X86TargetLowering::LowerBUILD_VECTORvXi1
SDLoc dl(Op);
if (ISD::isBuildVectorAllZeros(Op.getNode()))
- return DAG.getTargetConstant(0, dl, VT);
+ return Op;
if (ISD::isBuildVectorAllOnes(Op.getNode()))
- return DAG.getTargetConstant(1, dl, VT);
+ return Op;
if (ISD::isBuildVectorOfConstantSDNodes(Op.getNode())) {
if (VT == MVT::v64i1 && !Subtarget.is64Bit()) {
@@ -19509,9 +19509,9 @@ static SDValue getMaskNode(SDValue Mask,
const SDLoc &dl) {
if (isAllOnesConstant(Mask))
- return DAG.getTargetConstant(1, dl, MaskVT);
+ return DAG.getConstant(1, dl, MaskVT);
if (X86::isZeroNode(Mask))
- return DAG.getTargetConstant(0, dl, MaskVT);
+ return DAG.getConstant(0, dl, MaskVT);
if (MaskVT.bitsGT(Mask.getSimpleValueType())) {
// Mask should be extended
@@ -20099,7 +20099,7 @@ SDValue X86TargetLowering::LowerINTRINSI
Mask.getSimpleValueType().getSizeInBits());
SDValue FPclass = DAG.getNode(IntrData->Opc0, dl, MaskVT, Src1, Imm);
SDValue FPclassMask = getVectorMaskingNode(FPclass, Mask,
- DAG.getTargetConstant(0, dl, MaskVT),
+ DAG.getConstant(0, dl, MaskVT),
Subtarget, DAG);
SDValue Res = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, BitcastVT,
DAG.getUNDEF(BitcastVT), FPclassMask,
@@ -20112,7 +20112,7 @@ SDValue X86TargetLowering::LowerINTRINSI
SDValue Mask = Op.getOperand(3);
SDValue FPclass = DAG.getNode(IntrData->Opc0, dl, MVT::v1i1, Src1, Imm);
SDValue FPclassMask = getScalarMaskingNode(FPclass, Mask,
- DAG.getTargetConstant(0, dl, MVT::i1), Subtarget, DAG);
+ DAG.getConstant(0, dl, MVT::i1), Subtarget, DAG);
return DAG.getNode(X86ISD::VEXTRACT, dl, MVT::i8, FPclassMask,
DAG.getIntPtrConstant(0, dl));
}
@@ -20156,8 +20156,7 @@ SDValue X86TargetLowering::LowerINTRINSI
Op.getOperand(2));
}
SDValue CmpMask = getVectorMaskingNode(Cmp, Mask,
- DAG.getTargetConstant(0, dl,
- MaskVT),
+ DAG.getConstant(0, dl, MaskVT),
Subtarget, DAG);
SDValue Res = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, BitcastVT,
DAG.getUNDEF(BitcastVT), CmpMask,
@@ -20181,8 +20180,7 @@ SDValue X86TargetLowering::LowerINTRINSI
Cmp = DAG.getNode(IntrData->Opc0, dl, MVT::v1i1, Src1, Src2, CC);
SDValue CmpMask = getScalarMaskingNode(Cmp, Mask,
- DAG.getTargetConstant(0, dl,
- MVT::i1),
+ DAG.getConstant(0, dl, MVT::i1),
Subtarget, DAG);
return DAG.getNode(X86ISD::VEXTRACT, dl, MVT::i8, CmpMask,
DAG.getIntPtrConstant(0, dl));
Modified: llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll?rev=320260&r1=320259&r2=320260&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll (original)
+++ llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll Sat Dec 9 11:18:30 2017
@@ -299,8 +299,8 @@ define <8 x i32> @test6(<8 x i32>%a1, <8
;
; KNL_32-LABEL: test6:
; KNL_32: # %bb.0:
-; KNL_32-NEXT: vpmovsxdq %ymm1, %zmm2
; KNL_32-NEXT: kxnorw %k0, %k0, %k1
+; KNL_32-NEXT: vpmovsxdq %ymm1, %zmm2
; KNL_32-NEXT: kxnorw %k0, %k0, %k2
; KNL_32-NEXT: vpgatherqd (,%zmm2), %ymm1 {%k2}
; KNL_32-NEXT: vpscatterqd %ymm0, (,%zmm2) {%k1}
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