[llvm] r320031 - [RISCV] Add missed tests for RV64D MC layer support

[Alex Bradbury via llvm-commits]

Author: asb
Date: Thu Dec  7 03:05:38 2017
New Revision: 320031

URL: http://llvm.org/viewvc/llvm-project?rev=320031&view=rev
Log:
[RISCV] Add missed tests for RV64D MC layer support

Add tests missed in r320029.

Added:
    llvm/trunk/test/MC/RISCV/rv64d-invalid.s
    llvm/trunk/test/MC/RISCV/rv64d-valid.s

Added: llvm/trunk/test/MC/RISCV/rv64d-invalid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/RISCV/rv64d-invalid.s?rev=320031&view=auto
==============================================================================
--- llvm/trunk/test/MC/RISCV/rv64d-invalid.s (added)
+++ llvm/trunk/test/MC/RISCV/rv64d-invalid.s Thu Dec  7 03:05:38 2017
@@ -0,0 +1,11 @@
+# RUN: not llvm-mc -triple riscv64 -mattr=+d < %s 2>&1 | FileCheck %s
+
+# Integer registers where FP regs are expected
+fcvt.l.d ft0, a0 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
+fcvt.lu.d ft1, a1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
+fmv.x.d ft2, a2 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
+
+# FP registers where integer regs are expected
+fcvt.d.l a3, ft3 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
+fcvt.d.lu a4, ft4 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
+fmv.d.x a5, ft5 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction

Added: llvm/trunk/test/MC/RISCV/rv64d-valid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/RISCV/rv64d-valid.s?rev=320031&view=auto
==============================================================================
--- llvm/trunk/test/MC/RISCV/rv64d-valid.s (added)
+++ llvm/trunk/test/MC/RISCV/rv64d-valid.s Thu Dec  7 03:05:38 2017
@@ -0,0 +1,49 @@
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+d -show-encoding \
+# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-INST %s
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+d < %s \
+# RUN:     | llvm-objdump -mattr=+d -d - | FileCheck -check-prefix=CHECK-INST %s
+# RUN: not llvm-mc -triple riscv32 -mattr=+d < %s 2>&1 \
+# RUN:     | FileCheck -check-prefix=CHECK-RV32 %s
+
+# CHECK-INST: fcvt.l.d a0, ft0
+# CHECK: encoding: [0x53,0x75,0x20,0xc2]
+# CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled
+fcvt.l.d a0, ft0
+# CHECK-INST: fcvt.lu.d a1, ft1
+# CHECK: encoding: [0xd3,0xf5,0x30,0xc2]
+# CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled
+fcvt.lu.d a1, ft1
+# CHECK-INST: fmv.x.d a2, ft2
+# CHECK: encoding: [0x53,0x06,0x01,0xe2]
+# CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled
+fmv.x.d a2, ft2
+# CHECK-INST: fcvt.d.l ft3, a3
+# CHECK: encoding: [0xd3,0xf1,0x26,0xd2]
+# CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled
+fcvt.d.l ft3, a3
+# CHECK-INST: fcvt.d.lu ft4, a4
+# CHECK: encoding: [0x53,0x72,0x37,0xd2]
+# CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled
+fcvt.d.lu ft4, a4
+# CHECK-INST: fmv.d.x ft5, a5
+# CHECK: encoding: [0xd3,0x82,0x07,0xf2]
+# CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled
+fmv.d.x ft5, a5
+
+# Rounding modes
+# CHECK-INST: fcvt.d.l ft3, a3, rne
+# CHECK: encoding: [0xd3,0x81,0x26,0xd2]
+# CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled
+fcvt.d.l ft3, a3, rne
+# CHECK-INST: fcvt.d.lu ft4, a4, rtz
+# CHECK: encoding: [0x53,0x12,0x37,0xd2]
+# CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled
+fcvt.d.lu ft4, a4, rtz
+# CHECK-INST: fcvt.l.d a0, ft0, rdn
+# CHECK: encoding: [0x53,0x25,0x20,0xc2]
+# CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled
+fcvt.l.d a0, ft0, rdn
+# CHECK-INST: fcvt.lu.d a1, ft1, rup
+# CHECK: encoding: [0xd3,0xb5,0x30,0xc2]
+# CHECK-RV32: :[[@LINE+1]]:1: error: instruction use requires an option to be enabled
+fcvt.lu.d a1, ft1, rup