[llvm] r320029 - [RISCV] MC layer support for the standard RV64D instruction set extension

[Alex Bradbury via llvm-commits]

Author: asb
Date: Thu Dec  7 03:04:18 2017
New Revision: 320029

URL: http://llvm.org/viewvc/llvm-project?rev=320029&view=rev
Log:
[RISCV] MC layer support for the standard RV64D instruction set extension

Modified:
    llvm/trunk/lib/Target/RISCV/RISCVInstrInfoD.td

Modified: llvm/trunk/lib/Target/RISCV/RISCVInstrInfoD.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVInstrInfoD.td?rev=320029&r1=320028&r2=320029&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVInstrInfoD.td (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVInstrInfoD.td Thu Dec  7 03:04:18 2017
@@ -129,3 +129,33 @@ def FCVT_D_WU : FPUnaryOp_r<0b1101001, 0
   let rs2 = 0b00001;
 }
 } // Predicates = [HasStdExtD]
+
+let Predicates = [HasStdExtD, IsRV64] in {
+def FCVT_L_D : FPUnaryOp_r_frm<0b1100001, GPR, FPR64, "fcvt.l.d"> {
+  let rs2 = 0b00010;
+}
+def          : FPUnaryOpDynFrmAlias<FCVT_L_D, "fcvt.l.d", GPR, FPR64>;
+
+def FCVT_LU_D : FPUnaryOp_r_frm<0b1100001, GPR, FPR64, "fcvt.lu.d"> {
+  let rs2 = 0b00011;
+}
+def           : FPUnaryOpDynFrmAlias<FCVT_LU_D, "fcvt.lu.d", GPR, FPR64>;
+
+def FMV_X_D : FPUnaryOp_r<0b1110001, 0b000, GPR, FPR64, "fmv.x.d"> {
+  let rs2 = 0b00000;
+}
+
+def FCVT_D_L : FPUnaryOp_r_frm<0b1101001, FPR64, GPR, "fcvt.d.l"> {
+  let rs2 = 0b00010;
+}
+def          : FPUnaryOpDynFrmAlias<FCVT_D_L, "fcvt.d.l", FPR64, GPR>;
+
+def FCVT_D_LU : FPUnaryOp_r_frm<0b1101001, FPR64, GPR, "fcvt.d.lu"> {
+  let rs2 = 0b00011;
+}
+def           : FPUnaryOpDynFrmAlias<FCVT_D_LU, "fcvt.d.lu", FPR64, GPR>;
+
+def FMV_D_X : FPUnaryOp_r<0b1111001, 0b000, FPR64, GPR, "fmv.d.x"> {
+  let rs2 = 0b00000;
+}
+} // Predicates = [HasStdExtD, IsRV64]