[PATCH] D39400: WIP: [MachineOperand][MIR] Add isRenamable to MachineOperand.

[Geoff Berry via Phabricator via llvm-commits]

gberry updated this revision to Diff 125424.
gberry added a comment.
Herald added a subscriber: JDevlieghere.

New version based on feedback from Matthias


https://reviews.llvm.org/D39400

Files:
  docs/MIRLangRef.rst
  include/llvm/CodeGen/MachineInstrBuilder.h
  include/llvm/CodeGen/MachineOperand.h
  lib/CodeGen/MIRParser/MILexer.cpp
  lib/CodeGen/MIRParser/MILexer.h
  lib/CodeGen/MIRParser/MIParser.cpp
  lib/CodeGen/MIRPrinter.cpp
  lib/CodeGen/MachineInstr.cpp
  lib/CodeGen/MachineOperand.cpp
  lib/CodeGen/MachineVerifier.cpp
  lib/CodeGen/RegAllocFast.cpp
  lib/CodeGen/VirtRegMap.cpp
  test/CodeGen/AArch64/arm64-misched-multimmo.ll
  test/CodeGen/AMDGPU/shrink-carry.mir
  test/CodeGen/AMDGPU/splitkit.mir
  test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
  test/CodeGen/AMDGPU/subreg_interference.mir
  test/CodeGen/AMDGPU/syncscopes.ll
  test/CodeGen/Hexagon/regalloc-bad-undef.mir
  test/CodeGen/PowerPC/byval-agg-info.ll
  test/CodeGen/SystemZ/regalloc-fast-invalid-kill-flag.mir
  test/CodeGen/X86/tail-merge-debugloc.ll
  test/DebugInfo/X86/pr34545.ll
  test/DebugInfo/X86/sdag-salvage-add.ll

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