[PATCH] D39400: WIP: [MachineOperand][MIR] Add isRenamable to MachineOperand.

[Geoff Berry via Phabricator via llvm-commits]

gberry added a comment.

@MatzeB I have a new version that is much simpler that I believe addresses all of your points.  I got rid of the context-dependent printing/parsing of the renamable flag (and changed it from 'norename') which ended up reducing the amount of lit test churn. I also restricted it to physical registers and tried to enforce the hasExtraRegAllocReq constraints, though that may not be complete.



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Comment at: include/llvm/CodeGen/MachineOperand.h:310-311
   bool isDead() const {
     assert(isReg() && "Wrong MachineOperand accessor");
-    return IsDead;
+    return IsDeadOrKill & IsDef;
   }
----------------
MatzeB wrote:
> I assume changing this to assert(isReg() && IsDef()) breaks too much code?
Yeah, I tried adding it and gave up after fixing it in about 5 different passes.


https://reviews.llvm.org/D39400