[llvm] r319187 - [CodeGen] Print register names in lowercase in both MIR and debug output
Francis Visoiu Mistrih via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 28 09:15:10 PST 2017
Modified: llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll (original)
+++ llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll Tue Nov 28 09:15:09 2017
@@ -811,26 +811,26 @@ declare <2 x double> @llvm.masked.gather
define <4 x float> @test15(float* %base, <4 x i32> %ind, <4 x i1> %mask) {
; KNL_64-LABEL: test15:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL_64-NEXT: vmovdqa %xmm1, %xmm1
; KNL_64-NEXT: vpmovsxdq %ymm0, %zmm2
; KNL_64-NEXT: vpslld $31, %ymm1, %ymm0
; KNL_64-NEXT: vptestmd %zmm0, %zmm0, %k1
; KNL_64-NEXT: vgatherqps (%rdi,%zmm2,4), %ymm0 {%k1}
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; KNL_64-NEXT: vzeroupper
; KNL_64-NEXT: retq
;
; KNL_32-LABEL: test15:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL_32-NEXT: vmovdqa %xmm1, %xmm1
; KNL_32-NEXT: movl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: vpmovsxdq %ymm0, %zmm2
; KNL_32-NEXT: vpslld $31, %ymm1, %ymm0
; KNL_32-NEXT: vptestmd %zmm0, %zmm0, %k1
; KNL_32-NEXT: vgatherqps (%eax,%zmm2,4), %ymm0 {%k1}
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; KNL_32-NEXT: vzeroupper
; KNL_32-NEXT: retl
;
@@ -861,8 +861,8 @@ define <4 x float> @test15(float* %base,
define <4 x double> @test16(double* %base, <4 x i32> %ind, <4 x i1> %mask, <4 x double> %src0) {
; KNL_64-LABEL: test16:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %YMM2<def> %YMM2<kill> %ZMM2<def>
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL_64-NEXT: # kill: %ymm2<def> %ymm2<kill> %zmm2<def>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL_64-NEXT: vpslld $31, %xmm1, %xmm1
; KNL_64-NEXT: vpsrad $31, %xmm1, %xmm1
; KNL_64-NEXT: vpmovsxdq %xmm1, %ymm1
@@ -876,8 +876,8 @@ define <4 x double> @test16(double* %bas
;
; KNL_32-LABEL: test16:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %YMM2<def> %YMM2<kill> %ZMM2<def>
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL_32-NEXT: # kill: %ymm2<def> %ymm2<kill> %zmm2<def>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL_32-NEXT: vpslld $31, %xmm1, %xmm1
; KNL_32-NEXT: vpsrad $31, %xmm1, %xmm1
; KNL_32-NEXT: vpmovsxdq %xmm1, %ymm1
@@ -916,8 +916,8 @@ define <4 x double> @test16(double* %bas
define <2 x double> @test17(double* %base, <2 x i32> %ind, <2 x i1> %mask, <2 x double> %src0) {
; KNL_64-LABEL: test17:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM2<def> %XMM2<kill> %ZMM2<def>
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_64-NEXT: # kill: %xmm2<def> %xmm2<kill> %zmm2<def>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_64-NEXT: vmovdqa %xmm1, %xmm1
; KNL_64-NEXT: vpsllq $63, %zmm1, %zmm1
; KNL_64-NEXT: vptestmq %zmm1, %zmm1, %k1
@@ -928,8 +928,8 @@ define <2 x double> @test17(double* %bas
;
; KNL_32-LABEL: test17:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM2<def> %XMM2<kill> %ZMM2<def>
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_32-NEXT: # kill: %xmm2<def> %xmm2<kill> %zmm2<def>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_32-NEXT: vmovdqa %xmm1, %xmm1
; KNL_32-NEXT: movl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: vpsllq $63, %zmm1, %zmm1
@@ -971,8 +971,8 @@ declare void @llvm.masked.scatter.v2f32.
define void @test18(<4 x i32>%a1, <4 x i32*> %ptr, <4 x i1>%mask) {
; KNL_64-LABEL: test18:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL_64-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL_64-NEXT: vmovdqa %xmm2, %xmm2
; KNL_64-NEXT: vpslld $31, %ymm2, %ymm2
; KNL_64-NEXT: vptestmd %zmm2, %zmm2, %k1
@@ -982,8 +982,8 @@ define void @test18(<4 x i32>%a1, <4 x i
;
; KNL_32-LABEL: test18:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM1<def> %XMM1<kill> %YMM1<def>
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL_32-NEXT: # kill: %xmm1<def> %xmm1<kill> %ymm1<def>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL_32-NEXT: vmovdqa %xmm2, %xmm2
; KNL_32-NEXT: vpmovsxdq %ymm1, %zmm1
; KNL_32-NEXT: vpslld $31, %ymm2, %ymm2
@@ -1013,8 +1013,8 @@ define void @test18(<4 x i32>%a1, <4 x i
define void @test19(<4 x double>%a1, double* %ptr, <4 x i1>%mask, <4 x i64> %ind) {
; KNL_64-LABEL: test19:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %YMM2<def> %YMM2<kill> %ZMM2<def>
-; KNL_64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL_64-NEXT: # kill: %ymm2<def> %ymm2<kill> %zmm2<def>
+; KNL_64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL_64-NEXT: vpslld $31, %xmm1, %xmm1
; KNL_64-NEXT: vpsrad $31, %xmm1, %xmm1
; KNL_64-NEXT: vpmovsxdq %xmm1, %ymm1
@@ -1027,8 +1027,8 @@ define void @test19(<4 x double>%a1, dou
;
; KNL_32-LABEL: test19:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %YMM2<def> %YMM2<kill> %ZMM2<def>
-; KNL_32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL_32-NEXT: # kill: %ymm2<def> %ymm2<kill> %zmm2<def>
+; KNL_32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL_32-NEXT: vpslld $31, %xmm1, %xmm1
; KNL_32-NEXT: vpsrad $31, %xmm1, %xmm1
; KNL_32-NEXT: vpmovsxdq %xmm1, %ymm1
@@ -1065,8 +1065,8 @@ define void @test19(<4 x double>%a1, dou
define void @test20(<2 x float>%a1, <2 x float*> %ptr, <2 x i1> %mask) {
; KNL_64-LABEL: test20:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL_64-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL_64-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,2],zero,zero
; KNL_64-NEXT: vmovaps %xmm2, %xmm2
; KNL_64-NEXT: vpslld $31, %ymm2, %ymm2
@@ -1077,7 +1077,7 @@ define void @test20(<2 x float>%a1, <2 x
;
; KNL_32-LABEL: test20:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL_32-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; KNL_32-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,2],zero,zero
; KNL_32-NEXT: vmovaps %xmm2, %xmm2
@@ -1090,7 +1090,7 @@ define void @test20(<2 x float>%a1, <2 x
;
; SKX-LABEL: test20:
; SKX: # BB#0:
-; SKX-NEXT: # kill: %XMM1<def> %XMM1<kill> %YMM1<def>
+; SKX-NEXT: # kill: %xmm1<def> %xmm1<kill> %ymm1<def>
; SKX-NEXT: vpsllq $63, %xmm2, %xmm2
; SKX-NEXT: vptestmq %xmm2, %xmm2, %k1
; SKX-NEXT: vscatterqps %xmm0, (,%ymm1) {%k1}
@@ -1112,7 +1112,7 @@ define void @test20(<2 x float>%a1, <2 x
define void @test21(<2 x i32>%a1, <2 x i32*> %ptr, <2 x i1>%mask) {
; KNL_64-LABEL: test21:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
+; KNL_64-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
; KNL_64-NEXT: vmovdqa %xmm2, %xmm2
; KNL_64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; KNL_64-NEXT: vpsllq $63, %zmm2, %zmm2
@@ -1123,7 +1123,7 @@ define void @test21(<2 x i32>%a1, <2 x i
;
; KNL_32-LABEL: test21:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
+; KNL_32-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
; KNL_32-NEXT: vmovdqa %xmm2, %xmm2
; KNL_32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; KNL_32-NEXT: vpsllq $63, %zmm2, %zmm2
@@ -1134,7 +1134,7 @@ define void @test21(<2 x i32>%a1, <2 x i
;
; SKX-LABEL: test21:
; SKX: # BB#0:
-; SKX-NEXT: # kill: %XMM1<def> %XMM1<kill> %YMM1<def>
+; SKX-NEXT: # kill: %xmm1<def> %xmm1<kill> %ymm1<def>
; SKX-NEXT: vpsllq $63, %xmm2, %xmm2
; SKX-NEXT: vptestmq %xmm2, %xmm2, %k1
; SKX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
@@ -1144,7 +1144,7 @@ define void @test21(<2 x i32>%a1, <2 x i
;
; SKX_32-LABEL: test21:
; SKX_32: # BB#0:
-; SKX_32-NEXT: # kill: %XMM1<def> %XMM1<kill> %YMM1<def>
+; SKX_32-NEXT: # kill: %xmm1<def> %xmm1<kill> %ymm1<def>
; SKX_32-NEXT: vpsllq $63, %xmm2, %xmm2
; SKX_32-NEXT: vptestmq %xmm2, %xmm2, %k1
; SKX_32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
@@ -1161,7 +1161,7 @@ declare <2 x float> @llvm.masked.gather.
define <2 x float> @test22(float* %base, <2 x i32> %ind, <2 x i1> %mask, <2 x float> %src0) {
; KNL_64-LABEL: test22:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM2<def> %XMM2<kill> %YMM2<def>
+; KNL_64-NEXT: # kill: %xmm2<def> %xmm2<kill> %ymm2<def>
; KNL_64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; KNL_64-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,2],zero,zero
; KNL_64-NEXT: vmovaps %xmm1, %xmm1
@@ -1175,7 +1175,7 @@ define <2 x float> @test22(float* %base,
;
; KNL_32-LABEL: test22:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM2<def> %XMM2<kill> %YMM2<def>
+; KNL_32-NEXT: # kill: %xmm2<def> %xmm2<kill> %ymm2<def>
; KNL_32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; KNL_32-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,2],zero,zero
; KNL_32-NEXT: vmovaps %xmm1, %xmm1
@@ -1215,8 +1215,8 @@ define <2 x float> @test22(float* %base,
define <2 x float> @test22a(float* %base, <2 x i64> %ind, <2 x i1> %mask, <2 x float> %src0) {
; KNL_64-LABEL: test22a:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM2<def> %XMM2<kill> %YMM2<def>
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_64-NEXT: # kill: %xmm2<def> %xmm2<kill> %ymm2<def>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_64-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,2],zero,zero
; KNL_64-NEXT: vmovaps %xmm1, %xmm1
; KNL_64-NEXT: vpslld $31, %ymm1, %ymm1
@@ -1228,8 +1228,8 @@ define <2 x float> @test22a(float* %base
;
; KNL_32-LABEL: test22a:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM2<def> %XMM2<kill> %YMM2<def>
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_32-NEXT: # kill: %xmm2<def> %xmm2<kill> %ymm2<def>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_32-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,2],zero,zero
; KNL_32-NEXT: vmovaps %xmm1, %xmm1
; KNL_32-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -1267,8 +1267,8 @@ declare <2 x i64> @llvm.masked.gather.v2
define <2 x i32> @test23(i32* %base, <2 x i32> %ind, <2 x i1> %mask, <2 x i32> %src0) {
; KNL_64-LABEL: test23:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM2<def> %XMM2<kill> %ZMM2<def>
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_64-NEXT: # kill: %xmm2<def> %xmm2<kill> %zmm2<def>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_64-NEXT: vmovdqa %xmm1, %xmm1
; KNL_64-NEXT: vpsllq $63, %zmm1, %zmm1
; KNL_64-NEXT: vptestmq %zmm1, %zmm1, %k1
@@ -1279,8 +1279,8 @@ define <2 x i32> @test23(i32* %base, <2
;
; KNL_32-LABEL: test23:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM2<def> %XMM2<kill> %ZMM2<def>
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_32-NEXT: # kill: %xmm2<def> %xmm2<kill> %zmm2<def>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_32-NEXT: vmovdqa %xmm1, %xmm1
; KNL_32-NEXT: movl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: vpsllq $63, %zmm1, %zmm1
@@ -1317,7 +1317,7 @@ define <2 x i32> @test23(i32* %base, <2
define <2 x i32> @test24(i32* %base, <2 x i32> %ind) {
; KNL_64-LABEL: test24:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_64-NEXT: movb $3, %al
; KNL_64-NEXT: kmovw %eax, %k1
; KNL_64-NEXT: vpgatherqq (%rdi,%zmm0,8), %zmm1 {%k1}
@@ -1327,7 +1327,7 @@ define <2 x i32> @test24(i32* %base, <2
;
; KNL_32-LABEL: test24:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_32-NEXT: movl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: vmovdqa {{.*#+}} xmm1 = [1,0,1,0]
; KNL_32-NEXT: vpsllq $63, %zmm1, %zmm1
@@ -1360,8 +1360,8 @@ define <2 x i32> @test24(i32* %base, <2
define <2 x i64> @test25(i64* %base, <2 x i32> %ind, <2 x i1> %mask, <2 x i64> %src0) {
; KNL_64-LABEL: test25:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM2<def> %XMM2<kill> %ZMM2<def>
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_64-NEXT: # kill: %xmm2<def> %xmm2<kill> %zmm2<def>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_64-NEXT: vmovdqa %xmm1, %xmm1
; KNL_64-NEXT: vpsllq $63, %zmm1, %zmm1
; KNL_64-NEXT: vptestmq %zmm1, %zmm1, %k1
@@ -1372,8 +1372,8 @@ define <2 x i64> @test25(i64* %base, <2
;
; KNL_32-LABEL: test25:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM2<def> %XMM2<kill> %ZMM2<def>
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_32-NEXT: # kill: %xmm2<def> %xmm2<kill> %zmm2<def>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_32-NEXT: vmovdqa %xmm1, %xmm1
; KNL_32-NEXT: movl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: vpsllq $63, %zmm1, %zmm1
@@ -1408,8 +1408,8 @@ define <2 x i64> @test25(i64* %base, <2
define <2 x i64> @test26(i64* %base, <2 x i32> %ind, <2 x i64> %src0) {
; KNL_64-LABEL: test26:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_64-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_64-NEXT: movb $3, %al
; KNL_64-NEXT: kmovw %eax, %k1
; KNL_64-NEXT: vpgatherqq (%rdi,%zmm0,8), %zmm1 {%k1}
@@ -1419,8 +1419,8 @@ define <2 x i64> @test26(i64* %base, <2
;
; KNL_32-LABEL: test26:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; KNL_32-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; KNL_32-NEXT: movl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: vmovdqa {{.*#+}} xmm2 = [1,0,1,0]
; KNL_32-NEXT: vpsllq $63, %zmm2, %zmm2
@@ -1459,7 +1459,7 @@ define <2 x float> @test27(float* %base,
; KNL_64-NEXT: movb $3, %al
; KNL_64-NEXT: kmovw %eax, %k1
; KNL_64-NEXT: vgatherqps (%rdi,%zmm1,4), %ymm0 {%k1}
-; KNL_64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; KNL_64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; KNL_64-NEXT: vzeroupper
; KNL_64-NEXT: retq
;
@@ -1471,7 +1471,7 @@ define <2 x float> @test27(float* %base,
; KNL_32-NEXT: movb $3, %cl
; KNL_32-NEXT: kmovw %ecx, %k1
; KNL_32-NEXT: vgatherqps (%eax,%zmm1,4), %ymm0 {%k1}
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; KNL_32-NEXT: vzeroupper
; KNL_32-NEXT: retl
;
@@ -1501,7 +1501,7 @@ define <2 x float> @test27(float* %base,
define void @test28(<2 x i32>%a1, <2 x i32*> %ptr) {
; KNL_64-LABEL: test28:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
+; KNL_64-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
; KNL_64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; KNL_64-NEXT: movb $3, %al
; KNL_64-NEXT: kmovw %eax, %k1
@@ -1511,7 +1511,7 @@ define void @test28(<2 x i32>%a1, <2 x i
;
; KNL_32-LABEL: test28:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
+; KNL_32-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
; KNL_32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; KNL_32-NEXT: vmovdqa {{.*#+}} xmm2 = [1,0,1,0]
; KNL_32-NEXT: vpsllq $63, %zmm2, %zmm2
@@ -1522,7 +1522,7 @@ define void @test28(<2 x i32>%a1, <2 x i
;
; SKX-LABEL: test28:
; SKX: # BB#0:
-; SKX-NEXT: # kill: %XMM1<def> %XMM1<kill> %YMM1<def>
+; SKX-NEXT: # kill: %xmm1<def> %xmm1<kill> %ymm1<def>
; SKX-NEXT: movb $3, %al
; SKX-NEXT: kmovw %eax, %k1
; SKX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
@@ -1532,7 +1532,7 @@ define void @test28(<2 x i32>%a1, <2 x i
;
; SKX_32-LABEL: test28:
; SKX_32: # BB#0:
-; SKX_32-NEXT: # kill: %XMM1<def> %XMM1<kill> %YMM1<def>
+; SKX_32-NEXT: # kill: %xmm1<def> %xmm1<kill> %ymm1<def>
; SKX_32-NEXT: movb $3, %al
; SKX_32-NEXT: kmovw %eax, %k1
; SKX_32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
@@ -1606,7 +1606,7 @@ define <3 x i32> @test30(<3 x i32*> %bas
; KNL_64-NEXT: vpsllq $2, %ymm1, %ymm1
; KNL_64-NEXT: vpaddq %ymm1, %ymm0, %ymm1
; KNL_64-NEXT: testb $1, %dil
-; KNL_64-NEXT: # implicit-def: %XMM0
+; KNL_64-NEXT: # implicit-def: %xmm0
; KNL_64-NEXT: je .LBB30_2
; KNL_64-NEXT: # BB#1: # %cond.load
; KNL_64-NEXT: vmovq %xmm1, %rax
@@ -1655,7 +1655,7 @@ define <3 x i32> @test30(<3 x i32*> %bas
; KNL_32-NEXT: vpslld $2, %xmm1, %xmm1
; KNL_32-NEXT: vpaddd %xmm1, %xmm0, %xmm1
; KNL_32-NEXT: testb $1, %al
-; KNL_32-NEXT: # implicit-def: %XMM0
+; KNL_32-NEXT: # implicit-def: %xmm0
; KNL_32-NEXT: je .LBB30_2
; KNL_32-NEXT: # BB#1: # %cond.load
; KNL_32-NEXT: vmovd %xmm1, %ecx
@@ -1703,7 +1703,7 @@ define <3 x i32> @test30(<3 x i32*> %bas
; SKX-NEXT: vpsllq $2, %ymm1, %ymm1
; SKX-NEXT: vpaddq %ymm1, %ymm0, %ymm1
; SKX-NEXT: testb $1, %al
-; SKX-NEXT: # implicit-def: %XMM0
+; SKX-NEXT: # implicit-def: %xmm0
; SKX-NEXT: je .LBB30_2
; SKX-NEXT: # BB#1: # %cond.load
; SKX-NEXT: vmovq %xmm1, %rax
@@ -1745,7 +1745,7 @@ define <3 x i32> @test30(<3 x i32*> %bas
; SKX_32-NEXT: vpslld $2, %xmm1, %xmm1
; SKX_32-NEXT: vpaddd %xmm1, %xmm0, %xmm2
; SKX_32-NEXT: testb $1, %al
-; SKX_32-NEXT: # implicit-def: %XMM1
+; SKX_32-NEXT: # implicit-def: %xmm1
; SKX_32-NEXT: je .LBB30_2
; SKX_32-NEXT: # BB#1: # %cond.load
; SKX_32-NEXT: vmovd %xmm2, %eax
@@ -2289,7 +2289,7 @@ declare void @llvm.masked.scatter.v16f64
define <4 x i64> @test_pr28312(<4 x i64*> %p1, <4 x i1> %k, <4 x i1> %k2,<4 x i64> %d) {
; KNL_64-LABEL: test_pr28312:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL_64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL_64-NEXT: vpslld $31, %xmm1, %xmm1
; KNL_64-NEXT: vpsrad $31, %xmm1, %xmm1
; KNL_64-NEXT: vpmovsxdq %xmm1, %ymm1
@@ -2310,7 +2310,7 @@ define <4 x i64> @test_pr28312(<4 x i64*
; KNL_32-NEXT: .cfi_def_cfa_register %ebp
; KNL_32-NEXT: andl $-32, %esp
; KNL_32-NEXT: subl $32, %esp
-; KNL_32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL_32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL_32-NEXT: vpslld $31, %xmm1, %xmm1
; KNL_32-NEXT: vpsrad $31, %xmm1, %xmm1
; KNL_32-NEXT: vpmovsxdq %xmm1, %ymm1
@@ -2482,7 +2482,7 @@ declare <1 x i32> @llvm.masked.gather.v1
define <2 x float> @large_index(float* %base, <2 x i128> %ind, <2 x i1> %mask, <2 x float> %src0) {
; KNL_64-LABEL: large_index:
; KNL_64: # BB#0:
-; KNL_64-NEXT: # kill: %XMM1<def> %XMM1<kill> %YMM1<def>
+; KNL_64-NEXT: # kill: %xmm1<def> %xmm1<kill> %ymm1<def>
; KNL_64-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
; KNL_64-NEXT: vmovaps %xmm0, %xmm0
; KNL_64-NEXT: vmovq %rcx, %xmm2
@@ -2497,7 +2497,7 @@ define <2 x float> @large_index(float* %
;
; KNL_32-LABEL: large_index:
; KNL_32: # BB#0:
-; KNL_32-NEXT: # kill: %XMM1<def> %XMM1<kill> %YMM1<def>
+; KNL_32-NEXT: # kill: %xmm1<def> %xmm1<kill> %ymm1<def>
; KNL_32-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
; KNL_32-NEXT: vmovaps %xmm0, %xmm0
; KNL_32-NEXT: movl {{[0-9]+}}(%esp), %eax
Modified: llvm/trunk/test/CodeGen/X86/masked_memop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/masked_memop.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/masked_memop.ll (original)
+++ llvm/trunk/test/CodeGen/X86/masked_memop.ll Tue Nov 28 09:15:09 2017
@@ -12,7 +12,7 @@ define <1 x double> @loadv1(<1 x i64> %t
; AVX-LABEL: loadv1:
; AVX: ## BB#0:
; AVX-NEXT: testq %rdi, %rdi
-; AVX-NEXT: ## implicit-def: %XMM1
+; AVX-NEXT: ## implicit-def: %xmm1
; AVX-NEXT: je LBB0_1
; AVX-NEXT: ## BB#2: ## %else
; AVX-NEXT: testq %rdi, %rdi
@@ -32,7 +32,7 @@ define <1 x double> @loadv1(<1 x i64> %t
; AVX512F-LABEL: loadv1:
; AVX512F: ## BB#0:
; AVX512F-NEXT: testq %rdi, %rdi
-; AVX512F-NEXT: ## implicit-def: %XMM1
+; AVX512F-NEXT: ## implicit-def: %xmm1
; AVX512F-NEXT: jne LBB0_2
; AVX512F-NEXT: ## BB#1: ## %cond.load
; AVX512F-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
@@ -46,7 +46,7 @@ define <1 x double> @loadv1(<1 x i64> %t
; SKX-LABEL: loadv1:
; SKX: ## BB#0:
; SKX-NEXT: testq %rdi, %rdi
-; SKX-NEXT: ## implicit-def: %XMM1
+; SKX-NEXT: ## implicit-def: %xmm1
; SKX-NEXT: jne LBB0_2
; SKX-NEXT: ## BB#1: ## %cond.load
; SKX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
@@ -316,14 +316,14 @@ define <8 x float> @test11a(<8 x i32> %t
;
; AVX512F-LABEL: test11a:
; AVX512F: ## BB#0:
-; AVX512F-NEXT: ## kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512F-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: ## kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512F-NEXT: ## kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX512F-NEXT: vpcmpeqd %zmm2, %zmm0, %k0
; AVX512F-NEXT: kshiftlw $8, %k0, %k0
; AVX512F-NEXT: kshiftrw $8, %k0, %k1
; AVX512F-NEXT: vblendmps (%rdi), %zmm1, %zmm0 {%k1}
-; AVX512F-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: ## kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; SKX-LABEL: test11a:
@@ -362,12 +362,12 @@ define <8 x i32> @test11b(<8 x i1> %mask
;
; AVX512F-LABEL: test11b:
; AVX512F: ## BB#0:
-; AVX512F-NEXT: ## kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
+; AVX512F-NEXT: ## kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; AVX512F-NEXT: vpmovsxwq %xmm0, %zmm0
; AVX512F-NEXT: vpsllq $63, %zmm0, %zmm0
; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k1
; AVX512F-NEXT: vpblendmd (%rdi), %zmm1, %zmm0 {%k1}
-; AVX512F-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: ## kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; SKX-LABEL: test11b:
@@ -407,7 +407,7 @@ define <8 x float> @test11c(<8 x i1> %ma
; AVX512F-NEXT: vpsllq $63, %zmm0, %zmm0
; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k1
; AVX512F-NEXT: vmovups (%rdi), %zmm0 {%k1} {z}
-; AVX512F-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: ## kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; SKX-LABEL: test11c:
@@ -447,7 +447,7 @@ define <8 x i32> @test11d(<8 x i1> %mask
; AVX512F-NEXT: vpsllq $63, %zmm0, %zmm0
; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k1
; AVX512F-NEXT: vmovdqu32 (%rdi), %zmm0 {%k1} {z}
-; AVX512F-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: ## kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; SKX-LABEL: test11d:
@@ -482,8 +482,8 @@ define void @test12(<8 x i32> %trigger,
;
; AVX512F-LABEL: test12:
; AVX512F: ## BB#0:
-; AVX512F-NEXT: ## kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512F-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: ## kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512F-NEXT: ## kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX512F-NEXT: vpcmpeqd %zmm2, %zmm0, %k0
; AVX512F-NEXT: kshiftlw $8, %k0, %k0
@@ -816,11 +816,11 @@ define <8 x float> @mload_constmask_v8f3
;
; AVX512F-LABEL: mload_constmask_v8f32:
; AVX512F: ## BB#0:
-; AVX512F-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: ## kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: movw $7, %ax
; AVX512F-NEXT: kmovw %eax, %k1
; AVX512F-NEXT: vmovups (%rdi), %zmm0 {%k1}
-; AVX512F-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: ## kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; SKX-LABEL: mload_constmask_v8f32:
@@ -868,11 +868,11 @@ define <8 x i32> @mload_constmask_v8i32(
;
; AVX512F-LABEL: mload_constmask_v8i32:
; AVX512F: ## BB#0:
-; AVX512F-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: ## kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: movw $135, %ax
; AVX512F-NEXT: kmovw %eax, %k1
; AVX512F-NEXT: vmovdqu32 (%rdi), %zmm0 {%k1}
-; AVX512F-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: ## kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; SKX-LABEL: mload_constmask_v8i32:
Modified: llvm/trunk/test/CodeGen/X86/maskmovdqu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/maskmovdqu.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/maskmovdqu.ll (original)
+++ llvm/trunk/test/CodeGen/X86/maskmovdqu.ll Tue Nov 28 09:15:09 2017
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-avx | grep -i EDI
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,-avx | grep -i RDI
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx | grep -i EDI
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | grep -i RDI
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-avx | grep -i edi
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,-avx | grep -i rdi
+; RUN: llc < %s -mtriple=i686-- -mattr=+avx | grep -i edi
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | grep -i rdi
; rdar://6573467
define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, i8* %c) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/misched-copy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/misched-copy.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/misched-copy.ll (original)
+++ llvm/trunk/test/CodeGen/X86/misched-copy.ll Tue Nov 28 09:15:09 2017
@@ -9,10 +9,10 @@
; MUL_HiLo PhysReg def copies should be just below the mul.
;
; CHECK: *** Final schedule for BB#1 ***
-; CHECK: %EAX<def> = COPY
-; CHECK-NEXT: MUL32r %vreg{{[0-9]+}}, %EAX<imp-def>, %EDX<imp-def>, %EFLAGS<imp-def,dead>, %EAX<imp-use>;
-; CHECK-NEXT: COPY %E{{[AD]}}X
-; CHECK-NEXT: COPY %E{{[AD]}}X
+; CHECK: %eax<def> = COPY
+; CHECK-NEXT: MUL32r %vreg{{[0-9]+}}, %eax<imp-def>, %edx<imp-def>, %eflags<imp-def,dead>, %eax<imp-use>;
+; CHECK-NEXT: COPY %e{{[ad]}}x
+; CHECK-NEXT: COPY %e{{[ad]}}x
; CHECK: DIVSSrm
define i64 @mulhoist(i32 %a, i32 %b) #0 {
entry:
Modified: llvm/trunk/test/CodeGen/X86/movmsk.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/movmsk.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/movmsk.ll (original)
+++ llvm/trunk/test/CodeGen/X86/movmsk.ll Tue Nov 28 09:15:09 2017
@@ -102,7 +102,7 @@ define void @float_call_signbit(double %
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: movq %xmm0, %rdi
; CHECK-NEXT: shrq $63, %rdi
-; CHECK-NEXT: ## kill: %EDI<def> %EDI<kill> %RDI<kill>
+; CHECK-NEXT: ## kill: %edi<def> %edi<kill> %rdi<kill>
; CHECK-NEXT: jmp _float_call_signbit_callee ## TAILCALL
entry:
%t0 = bitcast double %n to i64
Modified: llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll Tue Nov 28 09:15:09 2017
@@ -21,14 +21,14 @@ define i16 @test_mul_by_2(i16 %x) {
; X86: # BB#0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_2:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 2
ret i16 %mul
@@ -39,14 +39,14 @@ define i16 @test_mul_by_3(i16 %x) {
; X86: # BB#0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_3:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,2), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 3
ret i16 %mul
@@ -57,14 +57,14 @@ define i16 @test_mul_by_4(i16 %x) {
; X86: # BB#0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_4:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (,%rdi,4), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 4
ret i16 %mul
@@ -75,14 +75,14 @@ define i16 @test_mul_by_5(i16 %x) {
; X86: # BB#0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_5:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 5
ret i16 %mul
@@ -94,15 +94,15 @@ define i16 @test_mul_by_6(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_6:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: addl %edi, %edi
; X64-NEXT: leal (%rdi,%rdi,2), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 6
ret i16 %mul
@@ -114,15 +114,15 @@ define i16 @test_mul_by_7(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (,%ecx,8), %eax
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_7:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (,%rdi,8), %eax
; X64-NEXT: subl %edi, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 7
ret i16 %mul
@@ -133,14 +133,14 @@ define i16 @test_mul_by_8(i16 %x) {
; X86: # BB#0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $3, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_8:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (,%rdi,8), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 8
ret i16 %mul
@@ -151,14 +151,14 @@ define i16 @test_mul_by_9(i16 %x) {
; X86: # BB#0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_9:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,8), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 9
ret i16 %mul
@@ -170,15 +170,15 @@ define i16 @test_mul_by_10(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_10:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: addl %edi, %edi
; X64-NEXT: leal (%rdi,%rdi,4), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 10
ret i16 %mul
@@ -190,15 +190,15 @@ define i16 @test_mul_by_11(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,2), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_11:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: leal (%rdi,%rax,2), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 11
ret i16 %mul
@@ -210,15 +210,15 @@ define i16 @test_mul_by_12(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_12:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: shll $2, %edi
; X64-NEXT: leal (%rdi,%rdi,2), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 12
ret i16 %mul
@@ -230,15 +230,15 @@ define i16 @test_mul_by_13(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_13:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,2), %eax
; X64-NEXT: leal (%rdi,%rax,4), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 13
ret i16 %mul
@@ -251,16 +251,16 @@ define i16 @test_mul_by_14(i16 %x) {
; X86-NEXT: leal (%ecx,%ecx,2), %eax
; X86-NEXT: leal (%ecx,%eax,4), %eax
; X86-NEXT: addl %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_14:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,2), %eax
; X64-NEXT: leal (%rdi,%rax,4), %eax
; X64-NEXT: addl %edi, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 14
ret i16 %mul
@@ -272,15 +272,15 @@ define i16 @test_mul_by_15(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_15:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: leal (%rax,%rax,2), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 15
ret i16 %mul
@@ -291,7 +291,7 @@ define i16 @test_mul_by_16(i16 %x) {
; X86: # BB#0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $4, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_16:
@@ -310,16 +310,16 @@ define i16 @test_mul_by_17(i16 %x) {
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: shll $4, %eax
; X86-NEXT: addl %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_17:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: movl %edi, %eax
; X64-NEXT: shll $4, %eax
; X64-NEXT: leal (%rax,%rdi), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 17
ret i16 %mul
@@ -331,15 +331,15 @@ define i16 @test_mul_by_18(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,8), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_18:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: addl %edi, %edi
; X64-NEXT: leal (%rdi,%rdi,8), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 18
ret i16 %mul
@@ -352,16 +352,16 @@ define i16 @test_mul_by_19(i16 %x) {
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_19:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: shll $2, %eax
; X64-NEXT: subl %edi, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 19
ret i16 %mul
@@ -373,15 +373,15 @@ define i16 @test_mul_by_20(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_20:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: shll $2, %edi
; X64-NEXT: leal (%rdi,%rdi,4), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 20
ret i16 %mul
@@ -393,15 +393,15 @@ define i16 @test_mul_by_21(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_21:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: leal (%rdi,%rax,4), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 21
ret i16 %mul
@@ -414,16 +414,16 @@ define i16 @test_mul_by_22(i16 %x) {
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: leal (%ecx,%eax,4), %eax
; X86-NEXT: addl %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_22:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: leal (%rdi,%rax,4), %eax
; X64-NEXT: addl %edi, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 22
ret i16 %mul
@@ -436,16 +436,16 @@ define i16 @test_mul_by_23(i16 %x) {
; X86-NEXT: leal (%ecx,%ecx,2), %eax
; X86-NEXT: shll $3, %eax
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_23:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,2), %eax
; X64-NEXT: shll $3, %eax
; X64-NEXT: subl %edi, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 23
ret i16 %mul
@@ -457,15 +457,15 @@ define i16 @test_mul_by_24(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $3, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_24:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: shll $3, %edi
; X64-NEXT: leal (%rdi,%rdi,2), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 24
ret i16 %mul
@@ -477,15 +477,15 @@ define i16 @test_mul_by_25(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_25:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: leal (%rax,%rax,4), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 25
ret i16 %mul
@@ -498,16 +498,16 @@ define i16 @test_mul_by_26(i16 %x) {
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_26:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,8), %eax
; X64-NEXT: leal (%rax,%rax,2), %eax
; X64-NEXT: subl %edi, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 26
ret i16 %mul
@@ -519,15 +519,15 @@ define i16 @test_mul_by_27(i16 %x) {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_27:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,8), %eax
; X64-NEXT: leal (%rax,%rax,2), %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 27
ret i16 %mul
@@ -540,16 +540,16 @@ define i16 @test_mul_by_28(i16 %x) {
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: addl %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_28:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,8), %eax
; X64-NEXT: leal (%rax,%rax,2), %eax
; X64-NEXT: addl %edi, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 28
ret i16 %mul
@@ -563,17 +563,17 @@ define i16 @test_mul_by_29(i16 %x) {
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: addl %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_29:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,8), %eax
; X64-NEXT: leal (%rax,%rax,2), %eax
; X64-NEXT: addl %edi, %eax
; X64-NEXT: addl %edi, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 29
ret i16 %mul
@@ -587,7 +587,7 @@ define i16 @test_mul_by_30(i16 %x) {
; X86-NEXT: shll $5, %eax
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_30:
@@ -596,7 +596,7 @@ define i16 @test_mul_by_30(i16 %x) {
; X64-NEXT: shll $5, %eax
; X64-NEXT: subl %edi, %eax
; X64-NEXT: subl %edi, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 30
ret i16 %mul
@@ -609,7 +609,7 @@ define i16 @test_mul_by_31(i16 %x) {
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: shll $5, %eax
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_31:
@@ -617,7 +617,7 @@ define i16 @test_mul_by_31(i16 %x) {
; X64-NEXT: movl %edi, %eax
; X64-NEXT: shll $5, %eax
; X64-NEXT: subl %edi, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 31
ret i16 %mul
@@ -628,7 +628,7 @@ define i16 @test_mul_by_32(i16 %x) {
; X86: # BB#0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $5, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_32:
@@ -648,16 +648,16 @@ define i16 @test_mul_spec(i16 %x) nounwi
; X86-NEXT: leal 42(%eax,%eax,8), %ecx
; X86-NEXT: leal 2(%eax,%eax,4), %eax
; X86-NEXT: imull %ecx, %eax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_spec:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal 42(%rdi,%rdi,8), %ecx
; X64-NEXT: leal 2(%rdi,%rdi,4), %eax
; X64-NEXT: imull %ecx, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%mul = mul nsw i16 %x, 9
%add = add nsw i16 %mul, 42
Modified: llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll Tue Nov 28 09:15:09 2017
@@ -61,13 +61,13 @@ define i32 @test_mul_by_2(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_2:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_2:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
@@ -79,25 +79,25 @@ define i32 @test_mul_by_2(i32 %x) {
;
; HSW-NOOPT-LABEL: test_mul_by_2:
; HSW-NOOPT: # BB#0:
-; HSW-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (%rdi,%rdi), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_2:
; JAG-NOOPT: # BB#0:
-; JAG-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (%rdi,%rdi), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_2:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_2:
; SLM-NOOPT: # BB#0:
-; SLM-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (%rdi,%rdi), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 2
@@ -112,13 +112,13 @@ define i32 @test_mul_by_3(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_3:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_3:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
@@ -129,25 +129,25 @@ define i32 @test_mul_by_3(i32 %x) {
;
; HSW-NOOPT-LABEL: test_mul_by_3:
; HSW-NOOPT: # BB#0:
-; HSW-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_3:
; JAG-NOOPT: # BB#0:
-; JAG-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_3:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_3:
; SLM-NOOPT: # BB#0:
-; SLM-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 3
@@ -163,13 +163,13 @@ define i32 @test_mul_by_4(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_4:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_4:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
@@ -181,25 +181,25 @@ define i32 @test_mul_by_4(i32 %x) {
;
; HSW-NOOPT-LABEL: test_mul_by_4:
; HSW-NOOPT: # BB#0:
-; HSW-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (,%rdi,4), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_4:
; JAG-NOOPT: # BB#0:
-; JAG-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (,%rdi,4), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_4:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_4:
; SLM-NOOPT: # BB#0:
-; SLM-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (,%rdi,4), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 4
@@ -214,13 +214,13 @@ define i32 @test_mul_by_5(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_5:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_5:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
@@ -231,25 +231,25 @@ define i32 @test_mul_by_5(i32 %x) {
;
; HSW-NOOPT-LABEL: test_mul_by_5:
; HSW-NOOPT: # BB#0:
-; HSW-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_5:
; JAG-NOOPT: # BB#0:
-; JAG-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_5:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_5:
; SLM-NOOPT: # BB#0:
-; SLM-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 5
@@ -266,14 +266,14 @@ define i32 @test_mul_by_6(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_6:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: addl %edi, %edi # sched: [1:0.25]
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_6:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -295,7 +295,7 @@ define i32 @test_mul_by_6(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_6:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-SLM-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
@@ -318,14 +318,14 @@ define i32 @test_mul_by_7(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_7:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: subl %edi, %eax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_7:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: subl %edi, %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -347,7 +347,7 @@ define i32 @test_mul_by_7(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_7:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (,%rdi,8), %eax # sched: [1:1.00]
; X64-SLM-NEXT: subl %edi, %eax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
@@ -369,13 +369,13 @@ define i32 @test_mul_by_8(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_8:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_8:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
@@ -387,25 +387,25 @@ define i32 @test_mul_by_8(i32 %x) {
;
; HSW-NOOPT-LABEL: test_mul_by_8:
; HSW-NOOPT: # BB#0:
-; HSW-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_8:
; JAG-NOOPT: # BB#0:
-; JAG-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_8:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (,%rdi,8), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_8:
; SLM-NOOPT: # BB#0:
-; SLM-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (,%rdi,8), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 8
@@ -420,13 +420,13 @@ define i32 @test_mul_by_9(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_9:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_9:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
@@ -437,25 +437,25 @@ define i32 @test_mul_by_9(i32 %x) {
;
; HSW-NOOPT-LABEL: test_mul_by_9:
; HSW-NOOPT: # BB#0:
-; HSW-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_9:
; JAG-NOOPT: # BB#0:
-; JAG-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_9:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_9:
; SLM-NOOPT: # BB#0:
-; SLM-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 9
@@ -472,14 +472,14 @@ define i32 @test_mul_by_10(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_10:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: addl %edi, %edi # sched: [1:0.25]
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_10:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -501,7 +501,7 @@ define i32 @test_mul_by_10(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_10:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-SLM-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
@@ -524,14 +524,14 @@ define i32 @test_mul_by_11(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_11:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rax,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_11:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rax,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -574,14 +574,14 @@ define i32 @test_mul_by_12(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_12:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: shll $2, %edi # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_12:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: shll $2, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -603,7 +603,7 @@ define i32 @test_mul_by_12(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_12:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: shll $2, %edi # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
@@ -626,14 +626,14 @@ define i32 @test_mul_by_13(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_13:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_13:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -677,7 +677,7 @@ define i32 @test_mul_by_14(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_14:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: addl %edi, %eax # sched: [1:0.25]
@@ -685,7 +685,7 @@ define i32 @test_mul_by_14(i32 %x) {
;
; X64-JAG-LABEL: test_mul_by_14:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: addl %edi, %eax # sched: [1:0.50]
@@ -729,14 +729,14 @@ define i32 @test_mul_by_15(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_15:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_15:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -758,7 +758,7 @@ define i32 @test_mul_by_15(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_15:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rax,%rax,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
@@ -834,7 +834,7 @@ define i32 @test_mul_by_17(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_17:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: movl %edi, %eax # sched: [1:0.25]
; X64-HSW-NEXT: shll $4, %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rdi), %eax # sched: [1:0.50]
@@ -842,7 +842,7 @@ define i32 @test_mul_by_17(i32 %x) {
;
; X64-JAG-LABEL: test_mul_by_17:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: movl %edi, %eax # sched: [1:0.17]
; X64-JAG-NEXT: shll $4, %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rdi), %eax # sched: [1:0.50]
@@ -865,7 +865,7 @@ define i32 @test_mul_by_17(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_17:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: movl %edi, %eax # sched: [1:0.50]
; X64-SLM-NEXT: shll $4, %eax # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rax,%rdi), %eax # sched: [1:1.00]
@@ -889,14 +889,14 @@ define i32 @test_mul_by_18(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_18:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: addl %edi, %edi # sched: [1:0.25]
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_18:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -918,7 +918,7 @@ define i32 @test_mul_by_18(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_18:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-SLM-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
@@ -942,7 +942,7 @@ define i32 @test_mul_by_19(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_19:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: shll $2, %eax # sched: [1:0.50]
; X64-HSW-NEXT: subl %edi, %eax # sched: [1:0.25]
@@ -950,7 +950,7 @@ define i32 @test_mul_by_19(i32 %x) {
;
; X64-JAG-LABEL: test_mul_by_19:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: shll $2, %eax # sched: [1:0.50]
; X64-JAG-NEXT: subl %edi, %eax # sched: [1:0.50]
@@ -994,14 +994,14 @@ define i32 @test_mul_by_20(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_20:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: shll $2, %edi # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_20:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: shll $2, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -1023,7 +1023,7 @@ define i32 @test_mul_by_20(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_20:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: shll $2, %edi # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
@@ -1046,14 +1046,14 @@ define i32 @test_mul_by_21(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_21:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_21:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -1097,7 +1097,7 @@ define i32 @test_mul_by_22(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_22:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: addl %edi, %eax # sched: [1:0.25]
@@ -1105,7 +1105,7 @@ define i32 @test_mul_by_22(i32 %x) {
;
; X64-JAG-LABEL: test_mul_by_22:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: addl %edi, %eax # sched: [1:0.50]
@@ -1150,7 +1150,7 @@ define i32 @test_mul_by_23(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_23:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: shll $3, %eax # sched: [1:0.50]
; X64-HSW-NEXT: subl %edi, %eax # sched: [1:0.25]
@@ -1158,7 +1158,7 @@ define i32 @test_mul_by_23(i32 %x) {
;
; X64-JAG-LABEL: test_mul_by_23:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: shll $3, %eax # sched: [1:0.50]
; X64-JAG-NEXT: subl %edi, %eax # sched: [1:0.50]
@@ -1202,14 +1202,14 @@ define i32 @test_mul_by_24(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_24:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: shll $3, %edi # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_24:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: shll $3, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -1231,7 +1231,7 @@ define i32 @test_mul_by_24(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_24:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: shll $3, %edi # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
@@ -1254,14 +1254,14 @@ define i32 @test_mul_by_25(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_25:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_25:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -1283,7 +1283,7 @@ define i32 @test_mul_by_25(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_25:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rax,%rax,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
@@ -1307,7 +1307,7 @@ define i32 @test_mul_by_26(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_26:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: subl %edi, %eax # sched: [1:0.25]
@@ -1315,7 +1315,7 @@ define i32 @test_mul_by_26(i32 %x) {
;
; X64-JAG-LABEL: test_mul_by_26:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: subl %edi, %eax # sched: [1:0.50]
@@ -1359,14 +1359,14 @@ define i32 @test_mul_by_27(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_27:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_27:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
@@ -1388,7 +1388,7 @@ define i32 @test_mul_by_27(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_27:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rax,%rax,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
@@ -1412,7 +1412,7 @@ define i32 @test_mul_by_28(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_28:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: addl %edi, %eax # sched: [1:0.25]
@@ -1420,7 +1420,7 @@ define i32 @test_mul_by_28(i32 %x) {
;
; X64-JAG-LABEL: test_mul_by_28:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: addl %edi, %eax # sched: [1:0.50]
@@ -1466,7 +1466,7 @@ define i32 @test_mul_by_29(i32 %x) {
;
; X64-HSW-LABEL: test_mul_by_29:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: addl %edi, %eax # sched: [1:0.25]
@@ -1475,7 +1475,7 @@ define i32 @test_mul_by_29(i32 %x) {
;
; X64-JAG-LABEL: test_mul_by_29:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: addl %edi, %eax # sched: [1:0.50]
@@ -1681,7 +1681,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
;
; X64-HSW-LABEL: test_mul_spec:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %ecx # sched: [1:0.50]
; X64-HSW-NEXT: addl $42, %ecx # sched: [1:0.25]
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
@@ -1691,7 +1691,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
;
; X64-JAG-LABEL: test_mul_spec:
; X64-JAG: # BB#0:
-; X64-JAG-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal 42(%rdi,%rdi,8), %ecx # sched: [1:0.50]
; X64-JAG-NEXT: leal 2(%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: imull %ecx, %eax # sched: [3:1.00]
@@ -1707,7 +1707,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
;
; HSW-NOOPT-LABEL: test_mul_spec:
; HSW-NOOPT: # BB#0:
-; HSW-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (%rdi,%rdi,8), %ecx # sched: [1:0.50]
; HSW-NOOPT-NEXT: addl $42, %ecx # sched: [1:0.25]
; HSW-NOOPT-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
@@ -1717,7 +1717,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
;
; JAG-NOOPT-LABEL: test_mul_spec:
; JAG-NOOPT: # BB#0:
-; JAG-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal 42(%rdi,%rdi,8), %ecx # sched: [1:0.50]
; JAG-NOOPT-NEXT: leal 2(%rdi,%rdi,4), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: imull %ecx, %eax # sched: [3:1.00]
@@ -1725,7 +1725,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
;
; X64-SLM-LABEL: test_mul_spec:
; X64-SLM: # BB#0:
-; X64-SLM-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal 42(%rdi,%rdi,8), %ecx # sched: [1:1.00]
; X64-SLM-NEXT: leal 2(%rdi,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: imull %ecx, %eax # sched: [3:1.00]
@@ -1733,7 +1733,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
;
; SLM-NOOPT-LABEL: test_mul_spec:
; SLM-NOOPT: # BB#0:
-; SLM-NOOPT-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal 42(%rdi,%rdi,8), %ecx # sched: [1:1.00]
; SLM-NOOPT-NEXT: leal 2(%rdi,%rdi,4), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: imull %ecx, %eax # sched: [3:1.00]
Modified: llvm/trunk/test/CodeGen/X86/mul-constant-result.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-result.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-result.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-result.ll Tue Nov 28 09:15:09 2017
@@ -188,7 +188,7 @@ define i32 @mult(i32, i32) local_unnamed
;
; X64-HSW-LABEL: mult:
; X64-HSW: # BB#0:
-; X64-HSW-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: cmpl $1, %esi
; X64-HSW-NEXT: movl $1, %ecx
; X64-HSW-NEXT: movl %esi, %eax
@@ -202,60 +202,60 @@ define i32 @mult(i32, i32) local_unnamed
; X64-HSW-NEXT: jmpq *.LJTI0_0(,%rdi,8)
; X64-HSW-NEXT: .LBB0_2:
; X64-HSW-NEXT: addl %eax, %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_36:
; X64-HSW-NEXT: xorl %eax, %eax
; X64-HSW-NEXT: .LBB0_37:
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_3:
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_4:
; X64-HSW-NEXT: shll $2, %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_5:
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_6:
; X64-HSW-NEXT: addl %eax, %eax
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_7:
; X64-HSW-NEXT: leal (,%rax,8), %ecx
; X64-HSW-NEXT: jmp .LBB0_8
; X64-HSW-NEXT: .LBB0_9:
; X64-HSW-NEXT: shll $3, %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_10:
; X64-HSW-NEXT: leal (%rax,%rax,8), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_11:
; X64-HSW-NEXT: addl %eax, %eax
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_12:
; X64-HSW-NEXT: leal (%rax,%rax,4), %ecx
; X64-HSW-NEXT: leal (%rax,%rcx,2), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_13:
; X64-HSW-NEXT: shll $2, %eax
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_14:
; X64-HSW-NEXT: leal (%rax,%rax,2), %ecx
; X64-HSW-NEXT: leal (%rax,%rcx,4), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_15:
; X64-HSW-NEXT: leal (%rax,%rax,2), %ecx
@@ -263,11 +263,11 @@ define i32 @mult(i32, i32) local_unnamed
; X64-HSW-NEXT: .LBB0_18:
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_19:
; X64-HSW-NEXT: shll $4, %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_20:
; X64-HSW-NEXT: movl %eax, %ecx
@@ -276,7 +276,7 @@ define i32 @mult(i32, i32) local_unnamed
; X64-HSW-NEXT: .LBB0_21:
; X64-HSW-NEXT: addl %eax, %eax
; X64-HSW-NEXT: leal (%rax,%rax,8), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_22:
; X64-HSW-NEXT: leal (%rax,%rax,4), %ecx
@@ -285,12 +285,12 @@ define i32 @mult(i32, i32) local_unnamed
; X64-HSW-NEXT: .LBB0_23:
; X64-HSW-NEXT: shll $2, %eax
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_24:
; X64-HSW-NEXT: leal (%rax,%rax,4), %ecx
; X64-HSW-NEXT: leal (%rax,%rcx,4), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_25:
; X64-HSW-NEXT: leal (%rax,%rax,4), %ecx
@@ -304,12 +304,12 @@ define i32 @mult(i32, i32) local_unnamed
; X64-HSW-NEXT: .LBB0_27:
; X64-HSW-NEXT: shll $3, %eax
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_28:
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_29:
; X64-HSW-NEXT: leal (%rax,%rax,8), %ecx
@@ -318,7 +318,7 @@ define i32 @mult(i32, i32) local_unnamed
; X64-HSW-NEXT: .LBB0_30:
; X64-HSW-NEXT: leal (%rax,%rax,8), %eax
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_31:
; X64-HSW-NEXT: leal (%rax,%rax,8), %ecx
@@ -331,7 +331,7 @@ define i32 @mult(i32, i32) local_unnamed
; X64-HSW-NEXT: .LBB0_17:
; X64-HSW-NEXT: addl %eax, %ecx
; X64-HSW-NEXT: movl %ecx, %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_33:
; X64-HSW-NEXT: movl %eax, %ecx
@@ -344,11 +344,11 @@ define i32 @mult(i32, i32) local_unnamed
; X64-HSW-NEXT: .LBB0_8:
; X64-HSW-NEXT: subl %eax, %ecx
; X64-HSW-NEXT: movl %ecx, %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
; X64-HSW-NEXT: .LBB0_35:
; X64-HSW-NEXT: shll $5, %eax
-; X64-HSW-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; X64-HSW-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; X64-HSW-NEXT: retq
%3 = icmp eq i32 %1, 0
%4 = icmp sgt i32 %1, 1
Modified: llvm/trunk/test/CodeGen/X86/negate-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/negate-i1.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/negate-i1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/negate-i1.ll Tue Nov 28 09:15:09 2017
@@ -49,7 +49,7 @@ define i16 @select_i16_neg1_or_0(i1 %a)
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andl $1, %eax
; X32-NEXT: negl %eax
-; X32-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X32-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X32-NEXT: retl
%b = sext i1 %a to i16
ret i16 %b
@@ -66,7 +66,7 @@ define i16 @select_i16_neg1_or_0_zeroext
; X32: # BB#0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: negl %eax
-; X32-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X32-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X32-NEXT: retl
%b = sext i1 %a to i16
ret i16 %b
@@ -109,7 +109,7 @@ define i32 @select_i32_neg1_or_0_zeroext
define i64 @select_i64_neg1_or_0(i1 %a) {
; X64-LABEL: select_i64_neg1_or_0:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: andl $1, %edi
; X64-NEXT: negq %rdi
; X64-NEXT: movq %rdi, %rax
Modified: llvm/trunk/test/CodeGen/X86/norex-subreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/norex-subreg.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/norex-subreg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/norex-subreg.ll Tue Nov 28 09:15:09 2017
@@ -4,10 +4,10 @@ target triple = "x86_64-apple-macosx10.7
; This test case extracts a sub_8bit_hi sub-register:
;
-; %R8B<def> = COPY %BH, %EBX<imp-use,kill>
-; %ESI<def> = MOVZX32_NOREXrr8 %R8B<kill>
+; %r8b<def> = COPY %bh, %ebx<imp-use,kill>
+; %esi<def> = MOVZX32_NOREXrr8 %r8b<kill>
;
-; The register allocation above is invalid, %BH can only be encoded without an
+; The register allocation above is invalid, %bh can only be encoded without an
; REX prefix, so the destination register must be GR8_NOREX. The code above
; triggers an assertion in copyPhysReg.
;
@@ -42,7 +42,7 @@ entry:
; This test case extracts a sub_8bit_hi sub-register:
;
; %vreg2<def> = COPY %vreg1:sub_8bit_hi; GR8:%vreg2 GR64_ABCD:%vreg1
-; TEST8ri %vreg2, 1, %EFLAGS<imp-def>; GR8:%vreg2
+; TEST8ri %vreg2, 1, %eflags<imp-def>; GR8:%vreg2
;
; %vreg2 must be constrained to GR8_NOREX, or the COPY could become impossible.
;
Modified: llvm/trunk/test/CodeGen/X86/oddshuffles.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/oddshuffles.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/oddshuffles.ll (original)
+++ llvm/trunk/test/CodeGen/X86/oddshuffles.ll Tue Nov 28 09:15:09 2017
@@ -30,7 +30,7 @@ define void @v3i64(<2 x i64> %a, <2 x i6
;
; AVX2-LABEL: v3i64:
; AVX2: # BB#0:
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm1
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,1,3]
; AVX2-NEXT: vpextrq $1, %xmm0, 16(%rdi)
@@ -65,7 +65,7 @@ define void @v3f64(<2 x double> %a, <2 x
;
; AVX2-LABEL: v3f64:
; AVX2: # BB#0:
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
; AVX2-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[0,2,1,3]
; AVX2-NEXT: vmovhpd %xmm0, 16(%rdi)
@@ -205,7 +205,7 @@ define void @v5i32(<4 x i32> %a, <4 x i3
;
; AVX2-LABEL: v5i32:
; AVX2: # BB#0:
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = <0,5,1,6,3,u,u,u>
; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1
@@ -255,7 +255,7 @@ define void @v5f32(<4 x float> %a, <4 x
;
; AVX2-LABEL: v5f32:
; AVX2: # BB#0:
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = <0,5,1,6,3,u,u,u>
; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1
@@ -421,7 +421,7 @@ define void @v7i32(<4 x i32> %a, <4 x i3
;
; AVX2-LABEL: v7i32:
; AVX2: # BB#0:
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = <0,6,3,6,1,7,4,u>
; AVX2-NEXT: vpermps %ymm0, %ymm2, %ymm0
@@ -1697,7 +1697,7 @@ define <2 x double> @wrongorder(<4 x dou
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
; AVX1-NEXT: vmovaps %ymm1, 32(%rdi)
; AVX1-NEXT: vmovaps %ymm1, (%rdi)
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -1716,7 +1716,7 @@ define <2 x double> @wrongorder(<4 x dou
; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
; XOP-NEXT: vmovaps %ymm1, 32(%rdi)
; XOP-NEXT: vmovaps %ymm1, (%rdi)
-; XOP-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; XOP-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; XOP-NEXT: vzeroupper
; XOP-NEXT: retq
%shuffle = shufflevector <4 x double> %A, <4 x double> %A, <8 x i32> zeroinitializer
Modified: llvm/trunk/test/CodeGen/X86/or-lea.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/or-lea.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/or-lea.ll (original)
+++ llvm/trunk/test/CodeGen/X86/or-lea.ll Tue Nov 28 09:15:09 2017
@@ -9,8 +9,8 @@
define i32 @or_shift1_and1(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift1_and1:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %esi
; CHECK-NEXT: leal (%rsi,%rdi,2), %eax
; CHECK-NEXT: retq
@@ -24,8 +24,8 @@ define i32 @or_shift1_and1(i32 %x, i32 %
define i32 @or_shift1_and1_swapped(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift1_and1_swapped:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %esi
; CHECK-NEXT: leal (%rsi,%rdi,2), %eax
; CHECK-NEXT: retq
@@ -39,8 +39,8 @@ define i32 @or_shift1_and1_swapped(i32 %
define i32 @or_shift2_and1(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift2_and1:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %esi
; CHECK-NEXT: leal (%rsi,%rdi,4), %eax
; CHECK-NEXT: retq
@@ -54,8 +54,8 @@ define i32 @or_shift2_and1(i32 %x, i32 %
define i32 @or_shift3_and1(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift3_and1:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %esi
; CHECK-NEXT: leal (%rsi,%rdi,8), %eax
; CHECK-NEXT: retq
@@ -69,8 +69,8 @@ define i32 @or_shift3_and1(i32 %x, i32 %
define i32 @or_shift3_and7(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift3_and7:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $7, %esi
; CHECK-NEXT: leal (%rsi,%rdi,8), %eax
; CHECK-NEXT: retq
@@ -86,8 +86,8 @@ define i32 @or_shift3_and7(i32 %x, i32 %
define i32 @or_shift4_and1(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift4_and1:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: shll $4, %edi
; CHECK-NEXT: andl $1, %esi
; CHECK-NEXT: leal (%rsi,%rdi), %eax
@@ -104,7 +104,7 @@ define i32 @or_shift4_and1(i32 %x, i32 %
define i32 @or_shift3_and8(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift3_and8:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal (,%rdi,8), %eax
; CHECK-NEXT: andl $8, %esi
; CHECK-NEXT: orl %esi, %eax
Modified: llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll Tue Nov 28 09:15:09 2017
@@ -2,9 +2,9 @@
; rdar://5571034
; This requires physreg joining, %vreg13 is live everywhere:
-; 304L %CL<def> = COPY %vreg13:sub_8bit; GR32_ABCD:%vreg13
+; 304L %cl<def> = COPY %vreg13:sub_8bit; GR32_ABCD:%vreg13
; 320L %vreg15<def> = COPY %vreg19; GR32:%vreg15 GR32_NOSP:%vreg19
-; 336L %vreg15<def> = SAR32rCL %vreg15, %EFLAGS<imp-def,dead>, %CL<imp-use,kill>; GR32:%vreg15
+; 336L %vreg15<def> = SAR32rCL %vreg15, %eflags<imp-def,dead>, %cl<imp-use,kill>; GR32:%vreg15
define void @foo(i32* nocapture %quadrant, i32* nocapture %ptr, i32 %bbSize, i32 %bbStart, i32 %shifts) nounwind ssp {
; CHECK-LABEL: foo:
Modified: llvm/trunk/test/CodeGen/X86/pmul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pmul.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pmul.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pmul.ll Tue Nov 28 09:15:09 2017
@@ -63,7 +63,7 @@ define <16 x i8> @mul_v16i8c(<16 x i8> %
; AVX512BW-NEXT: vpmovsxbw %xmm0, %ymm0
; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
entry:
@@ -206,7 +206,7 @@ define <16 x i8> @mul_v16i8(<16 x i8> %i
; AVX512BW-NEXT: vpmovsxbw %xmm0, %ymm0
; AVX512BW-NEXT: vpmullw %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
entry:
Modified: llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll Tue Nov 28 09:15:09 2017
@@ -17,7 +17,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; GENERIC-NEXT: popcntw (%rsi), %cx # sched: [9:1.00]
; GENERIC-NEXT: popcntw %di, %ax # sched: [3:1.00]
; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; GENERIC-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; SLM-LABEL: test_ctpop_i16:
@@ -25,7 +25,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; SLM-NEXT: popcntw (%rsi), %cx # sched: [6:1.00]
; SLM-NEXT: popcntw %di, %ax # sched: [3:1.00]
; SLM-NEXT: orl %ecx, %eax # sched: [1:0.50]
-; SLM-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SLM-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_ctpop_i16:
@@ -33,7 +33,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; SANDY-NEXT: popcntw (%rsi), %cx # sched: [9:1.00]
; SANDY-NEXT: popcntw %di, %ax # sched: [3:1.00]
; SANDY-NEXT: orl %ecx, %eax # sched: [1:0.33]
-; SANDY-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SANDY-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_ctpop_i16:
@@ -41,7 +41,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; HASWELL-NEXT: popcntw (%rsi), %cx # sched: [3:1.00]
; HASWELL-NEXT: popcntw %di, %ax # sched: [3:1.00]
; HASWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; HASWELL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; HASWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_ctpop_i16:
@@ -49,7 +49,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; BROADWELL-NEXT: popcntw (%rsi), %cx # sched: [8:1.00]
; BROADWELL-NEXT: popcntw %di, %ax # sched: [3:1.00]
; BROADWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; BROADWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_ctpop_i16:
@@ -57,7 +57,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; SKYLAKE-NEXT: popcntw (%rsi), %cx # sched: [8:1.00]
; SKYLAKE-NEXT: popcntw %di, %ax # sched: [3:1.00]
; SKYLAKE-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SKYLAKE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_ctpop_i16:
@@ -65,7 +65,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; BTVER2-NEXT: popcntw (%rsi), %cx # sched: [8:1.00]
; BTVER2-NEXT: popcntw %di, %ax # sched: [3:1.00]
; BTVER2-NEXT: orl %ecx, %eax # sched: [1:0.50]
-; BTVER2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; BTVER2-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_ctpop_i16:
@@ -73,7 +73,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; ZNVER1-NEXT: popcntw (%rsi), %cx # sched: [10:1.00]
; ZNVER1-NEXT: popcntw %di, %ax # sched: [3:1.00]
; ZNVER1-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; ZNVER1-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; ZNVER1-NEXT: retq # sched: [1:0.50]
%1 = load i16, i16 *%a1
%2 = tail call i16 @llvm.ctpop.i16( i16 %1 )
Modified: llvm/trunk/test/CodeGen/X86/popcnt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/popcnt.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/popcnt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/popcnt.ll Tue Nov 28 09:15:09 2017
@@ -44,14 +44,14 @@ define i8 @cnt8(i8 %x) nounwind readnone
; X32-POPCNT: # BB#0:
; X32-POPCNT-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-POPCNT-NEXT: popcntw %ax, %ax
-; X32-POPCNT-NEXT: # kill: %AL<def> %AL<kill> %AX<kill>
+; X32-POPCNT-NEXT: # kill: %al<def> %al<kill> %ax<kill>
; X32-POPCNT-NEXT: retl
;
; X64-POPCNT-LABEL: cnt8:
; X64-POPCNT: # BB#0:
; X64-POPCNT-NEXT: movzbl %dil, %eax
; X64-POPCNT-NEXT: popcntw %ax, %ax
-; X64-POPCNT-NEXT: # kill: %AL<def> %AL<kill> %AX<kill>
+; X64-POPCNT-NEXT: # kill: %al<def> %al<kill> %ax<kill>
; X64-POPCNT-NEXT: retq
%cnt = tail call i8 @llvm.ctpop.i8(i8 %x)
ret i8 %cnt
@@ -79,7 +79,7 @@ define i16 @cnt16(i16 %x) nounwind readn
; X32-NEXT: shll $8, %eax
; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movzbl %ah, %eax
-; X32-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X32-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X32-NEXT: retl
;
; X64-LABEL: cnt16:
@@ -102,7 +102,7 @@ define i16 @cnt16(i16 %x) nounwind readn
; X64-NEXT: shll $8, %ecx
; X64-NEXT: addl %eax, %ecx
; X64-NEXT: movzbl %ch, %eax # NOREX
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
;
; X32-POPCNT-LABEL: cnt16:
Modified: llvm/trunk/test/CodeGen/X86/pr22970.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr22970.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr22970.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr22970.ll Tue Nov 28 09:15:09 2017
@@ -13,7 +13,7 @@ define i32 @PR22970_i32(i32* nocapture r
;
; X64-LABEL: PR22970_i32:
; X64: # BB#0:
-; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
+; X64-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; X64-NEXT: andl $4095, %esi # imm = 0xFFF
; X64-NEXT: movl 32(%rdi,%rsi,4), %eax
; X64-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/pr26870.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr26870.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr26870.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr26870.ll Tue Nov 28 09:15:09 2017
@@ -2,11 +2,11 @@
define x86_thiscallcc i32* @fn4(i32* %this, i8* dereferenceable(1) %p1) {
entry:
- %DL = getelementptr inbounds i32, i32* %this, i32 0
- %call.i = tail call x86_thiscallcc i64 @fn1(i32* %DL)
+ %dl = getelementptr inbounds i32, i32* %this, i32 0
+ %call.i = tail call x86_thiscallcc i64 @fn1(i32* %dl)
%getTypeAllocSize___trans_tmp_2.i = getelementptr inbounds i32, i32* %this, i32 0
%0 = load i32, i32* %getTypeAllocSize___trans_tmp_2.i, align 4
- %call.i8 = tail call x86_thiscallcc i64 @fn1(i32* %DL)
+ %call.i8 = tail call x86_thiscallcc i64 @fn1(i32* %dl)
%1 = insertelement <2 x i64> undef, i64 %call.i, i32 0
%2 = insertelement <2 x i64> %1, i64 %call.i8, i32 1
%3 = add nsw <2 x i64> %2, <i64 7, i64 7>
Modified: llvm/trunk/test/CodeGen/X86/pr28173.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr28173.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr28173.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr28173.ll Tue Nov 28 09:15:09 2017
@@ -27,7 +27,7 @@ define i16 @foo16(i1 zeroext %i) #0 {
; CHECK: # BB#0:
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: orl $65534, %eax # imm = 0xFFFE
-; CHECK-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; CHECK-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; CHECK-NEXT: retq
br label %bb
@@ -45,7 +45,7 @@ define i16 @foo16_1(i1 zeroext %i, i32 %
; CHECK: # BB#0:
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: orl $2, %eax
-; CHECK-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; CHECK-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; CHECK-NEXT: retq
br label %bb
Modified: llvm/trunk/test/CodeGen/X86/pr28560.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr28560.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr28560.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr28560.ll Tue Nov 28 09:15:09 2017
@@ -1,6 +1,6 @@
; RUN: llc -mtriple=i686-pc-linux -print-after=postrapseudos < %s 2>&1 | FileCheck %s
-; CHECK: MOV8rr %{{[A-D]}}L, %E[[R:[A-D]]]X<imp-use,kill>, %E[[R]]X<imp-def>
+; CHECK: MOV8rr %{{[a-d]}}l, %e[[R:[a-d]]]x<imp-use,kill>, %e[[R]]x<imp-def>
define i32 @foo(i32 %i, i32 %k, i8* %p) {
%f = icmp ne i32 %i, %k
%s = zext i1 %f to i8
Modified: llvm/trunk/test/CodeGen/X86/pr29061.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr29061.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr29061.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr29061.ll Tue Nov 28 09:15:09 2017
@@ -11,7 +11,7 @@ define void @t1(i8 signext %c) {
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .cfi_offset %edi, -8
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %edi
-; CHECK-NEXT: # kill: %DI<def> %DI<kill> %EDI<kill>
+; CHECK-NEXT: # kill: %di<def> %di<kill> %edi<kill>
; CHECK-NEXT: #APP
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: popl %edi
@@ -28,7 +28,7 @@ define void @t2(i8 signext %c) {
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .cfi_offset %esi, -8
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %esi
-; CHECK-NEXT: # kill: %SI<def> %SI<kill> %ESI<kill>
+; CHECK-NEXT: # kill: %si<def> %si<kill> %esi<kill>
; CHECK-NEXT: #APP
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: popl %esi
Modified: llvm/trunk/test/CodeGen/X86/pr30430.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr30430.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr30430.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr30430.ll Tue Nov 28 09:15:09 2017
@@ -73,7 +73,7 @@ define <16 x float> @makefloat(float %f1
; CHECK-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3]
; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[0]
-; CHECK-NEXT: # implicit-def: %YMM2
+; CHECK-NEXT: # implicit-def: %ymm2
; CHECK-NEXT: vmovaps %xmm1, %xmm2
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm2
; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -90,10 +90,10 @@ define <16 x float> @makefloat(float %f1
; CHECK-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm3[0],xmm1[3]
; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
; CHECK-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm3[0]
-; CHECK-NEXT: # implicit-def: %YMM3
+; CHECK-NEXT: # implicit-def: %ymm3
; CHECK-NEXT: vmovaps %xmm1, %xmm3
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm3, %ymm3
-; CHECK-NEXT: # implicit-def: %ZMM24
+; CHECK-NEXT: # implicit-def: %zmm24
; CHECK-NEXT: vmovaps %zmm3, %zmm24
; CHECK-NEXT: vinsertf64x4 $1, %ymm2, %zmm24, %zmm24
; CHECK-NEXT: vmovaps %zmm24, {{[0-9]+}}(%rsp)
Modified: llvm/trunk/test/CodeGen/X86/pr32282.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32282.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32282.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32282.ll Tue Nov 28 09:15:09 2017
@@ -64,7 +64,7 @@ define void @foo() {
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: xorl %edx, %edx
; X64-NEXT: divl %ecx
-; X64-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<def>
+; X64-NEXT: # kill: %eax<def> %eax<kill> %rax<def>
; X64-NEXT: .LBB0_3:
; X64-NEXT: testq %rax, %rax
; X64-NEXT: setne -{{[0-9]+}}(%rsp)
Modified: llvm/trunk/test/CodeGen/X86/pr32284.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32284.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32284.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32284.ll Tue Nov 28 09:15:09 2017
@@ -308,7 +308,7 @@ entry:
define void @f2() {
; X86-O0-LABEL: f2:
; X86-O0: # BB#0: # %entry
-; X86-O0-NEXT: # implicit-def: %RAX
+; X86-O0-NEXT: # implicit-def: %rax
; X86-O0-NEXT: movzbl var_7, %ecx
; X86-O0-NEXT: cmpb $0, var_7
; X86-O0-NEXT: setne %dl
@@ -361,7 +361,7 @@ define void @f2() {
; 686-O0-NEXT: .cfi_def_cfa_offset 14
; 686-O0-NEXT: .cfi_offset %esi, -12
; 686-O0-NEXT: .cfi_offset %edi, -8
-; 686-O0-NEXT: # implicit-def: %EAX
+; 686-O0-NEXT: # implicit-def: %eax
; 686-O0-NEXT: movzbl var_7, %ecx
; 686-O0-NEXT: cmpb $0, var_7
; 686-O0-NEXT: setne %dl
Modified: llvm/trunk/test/CodeGen/X86/pr32329.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32329.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32329.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32329.ll Tue Nov 28 09:15:09 2017
@@ -78,7 +78,7 @@ define void @foo() local_unnamed_addr {
; X64-NEXT: imull %esi, %ecx
; X64-NEXT: addl $-1437483407, %ecx # imm = 0xAA51BE71
; X64-NEXT: movl $9, %edx
-; X64-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X64-NEXT: # kill: %cl<def> %cl<kill> %ecx<kill>
; X64-NEXT: shlq %cl, %rdx
; X64-NEXT: movq %rdx, {{.*}}(%rip)
; X64-NEXT: cmpl %eax, %esi
Modified: llvm/trunk/test/CodeGen/X86/pr32345.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32345.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32345.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32345.ll Tue Nov 28 09:15:09 2017
@@ -10,7 +10,7 @@
define void @foo() {
; X640-LABEL: foo:
; X640: # BB#0: # %bb
-; X640-NEXT: # implicit-def: %RAX
+; X640-NEXT: # implicit-def: %rax
; X640-NEXT: movzwl var_22, %ecx
; X640-NEXT: movzwl var_27, %edx
; X640-NEXT: xorl %edx, %ecx
@@ -27,8 +27,8 @@ define void @foo() {
; X640-NEXT: movzwl var_27, %ecx
; X640-NEXT: subl $16610, %ecx # imm = 0x40E2
; X640-NEXT: movl %ecx, %ecx
-; X640-NEXT: # kill: %RCX<def> %ECX<kill>
-; X640-NEXT: # kill: %CL<def> %RCX<kill>
+; X640-NEXT: # kill: %rcx<def> %ecx<kill>
+; X640-NEXT: # kill: %cl<def> %rcx<kill>
; X640-NEXT: sarq %cl, %rsi
; X640-NEXT: movb %sil, %cl
; X640-NEXT: movb %cl, (%rax)
@@ -49,12 +49,12 @@ define void @foo() {
; 6860-NEXT: .cfi_offset %esi, -20
; 6860-NEXT: .cfi_offset %edi, -16
; 6860-NEXT: .cfi_offset %ebx, -12
-; 6860-NEXT: # implicit-def: %EAX
+; 6860-NEXT: # implicit-def: %eax
; 6860-NEXT: movw var_22, %cx
; 6860-NEXT: movzwl var_27, %edx
; 6860-NEXT: movw %dx, %si
; 6860-NEXT: xorw %si, %cx
-; 6860-NEXT: # implicit-def: %EDI
+; 6860-NEXT: # implicit-def: %edi
; 6860-NEXT: movw %cx, %di
; 6860-NEXT: xorl %edx, %edi
; 6860-NEXT: movw %di, %cx
@@ -65,7 +65,7 @@ define void @foo() {
; 6860-NEXT: movzwl var_27, %edx
; 6860-NEXT: movw %dx, %si
; 6860-NEXT: xorw %si, %cx
-; 6860-NEXT: # implicit-def: %EDI
+; 6860-NEXT: # implicit-def: %edi
; 6860-NEXT: movw %cx, %di
; 6860-NEXT: xorl %edx, %edi
; 6860-NEXT: movw %di, %cx
@@ -104,7 +104,7 @@ define void @foo() {
; X64-NEXT: movzwl %ax, %eax
; X64-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
; X64-NEXT: addl $-16610, %ecx # imm = 0xBF1E
-; X64-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X64-NEXT: # kill: %cl<def> %cl<kill> %ecx<kill>
; X64-NEXT: shrq %cl, %rax
; X64-NEXT: movb %al, (%rax)
; X64-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/pr32484.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32484.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32484.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32484.ll Tue Nov 28 09:15:09 2017
@@ -4,10 +4,10 @@
define void @foo() {
; CHECK-LABEL: foo:
; CHECK: # BB#0:
-; CHECK-NEXT: # implicit-def: %RAX
+; CHECK-NEXT: # implicit-def: %rax
; CHECK-NEXT: jmpq *%rax
; CHECK-NEXT: .LBB0_1:
-; CHECK-NEXT: # implicit-def: %RAX
+; CHECK-NEXT: # implicit-def: %rax
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
; CHECK-NEXT: movdqu %xmm1, (%rax)
Modified: llvm/trunk/test/CodeGen/X86/pr34653.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34653.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34653.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34653.ll Tue Nov 28 09:15:09 2017
@@ -64,7 +64,7 @@ define void @pr34653() {
; CHECK-NEXT: vpermilpd {{.*#+}} xmm5 = xmm5[1,0]
; CHECK-NEXT: vpermilpd {{.*#+}} xmm11 = xmm11[1,0]
; CHECK-NEXT: vpermilpd {{.*#+}} xmm13 = xmm13[1,0]
-; CHECK-NEXT: # kill: %YMM10<def> %YMM10<kill> %ZMM10<kill>
+; CHECK-NEXT: # kill: %ymm10<def> %ymm10<kill> %zmm10<kill>
; CHECK-NEXT: vextractf128 $1, %ymm10, %xmm10
; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
; CHECK-NEXT: vmovaps %xmm10, %xmm0
@@ -75,7 +75,7 @@ define void @pr34653() {
; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
-; CHECK-NEXT: # kill: %YMM9<def> %YMM9<kill> %ZMM9<kill>
+; CHECK-NEXT: # kill: %ymm9<def> %ymm9<kill> %zmm9<kill>
; CHECK-NEXT: vextractf128 $1, %ymm9, %xmm9
; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
; CHECK-NEXT: vmovaps %xmm9, %xmm0
@@ -88,7 +88,7 @@ define void @pr34653() {
; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
-; CHECK-NEXT: # kill: %YMM8<def> %YMM8<kill> %ZMM8<kill>
+; CHECK-NEXT: # kill: %ymm8<def> %ymm8<kill> %zmm8<kill>
; CHECK-NEXT: vextractf128 $1, %ymm8, %xmm8
; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
; CHECK-NEXT: vmovaps %xmm8, %xmm0
@@ -101,7 +101,7 @@ define void @pr34653() {
; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
-; CHECK-NEXT: # kill: %YMM7<def> %YMM7<kill> %ZMM7<kill>
+; CHECK-NEXT: # kill: %ymm7<def> %ymm7<kill> %zmm7<kill>
; CHECK-NEXT: vextractf128 $1, %ymm7, %xmm7
; CHECK-NEXT: vmovsd %xmm0, {{[0-9]+}}(%rsp) # 8-byte Spill
; CHECK-NEXT: vmovaps %xmm7, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/prolog-push-seq.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/prolog-push-seq.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/prolog-push-seq.ll (original)
+++ llvm/trunk/test/CodeGen/X86/prolog-push-seq.ll Tue Nov 28 09:15:09 2017
@@ -16,4 +16,4 @@ define fastcc void @foo(i32 %a, i32 %b)
ret void
}
-attributes #0 = { nounwind optsize "no-frame-pointer-elim-non-leaf"}
\ No newline at end of file
+attributes #0 = { nounwind optsize "no-frame-pointer-elim-non-leaf"}
Modified: llvm/trunk/test/CodeGen/X86/promote-vec3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/promote-vec3.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/promote-vec3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/promote-vec3.ll Tue Nov 28 09:15:09 2017
@@ -19,9 +19,9 @@ define <3 x i16> @zext_i8(<3 x i8>) {
; SSE3-NEXT: pextrw $2, %xmm0, %ecx
; SSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; SSE3-NEXT: movd %xmm0, %eax
-; SSE3-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; SSE3-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
-; SSE3-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
+; SSE3-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
+; SSE3-NEXT: # kill: %dx<def> %dx<kill> %edx<kill>
+; SSE3-NEXT: # kill: %cx<def> %cx<kill> %ecx<kill>
; SSE3-NEXT: retl
;
; SSE41-LABEL: zext_i8:
@@ -33,9 +33,9 @@ define <3 x i16> @zext_i8(<3 x i8>) {
; SSE41-NEXT: movd %xmm0, %eax
; SSE41-NEXT: pextrw $2, %xmm0, %edx
; SSE41-NEXT: pextrw $4, %xmm0, %ecx
-; SSE41-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; SSE41-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
-; SSE41-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
+; SSE41-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
+; SSE41-NEXT: # kill: %dx<def> %dx<kill> %edx<kill>
+; SSE41-NEXT: # kill: %cx<def> %cx<kill> %ecx<kill>
; SSE41-NEXT: retl
;
; AVX-32-LABEL: zext_i8:
@@ -47,9 +47,9 @@ define <3 x i16> @zext_i8(<3 x i8>) {
; AVX-32-NEXT: vmovd %xmm0, %eax
; AVX-32-NEXT: vpextrw $2, %xmm0, %edx
; AVX-32-NEXT: vpextrw $4, %xmm0, %ecx
-; AVX-32-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; AVX-32-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
-; AVX-32-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
+; AVX-32-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
+; AVX-32-NEXT: # kill: %dx<def> %dx<kill> %edx<kill>
+; AVX-32-NEXT: # kill: %cx<def> %cx<kill> %ecx<kill>
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: zext_i8:
@@ -61,9 +61,9 @@ define <3 x i16> @zext_i8(<3 x i8>) {
; AVX-64-NEXT: vmovd %xmm0, %eax
; AVX-64-NEXT: vpextrw $2, %xmm0, %edx
; AVX-64-NEXT: vpextrw $4, %xmm0, %ecx
-; AVX-64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; AVX-64-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
-; AVX-64-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
+; AVX-64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
+; AVX-64-NEXT: # kill: %dx<def> %dx<kill> %edx<kill>
+; AVX-64-NEXT: # kill: %cx<def> %cx<kill> %ecx<kill>
; AVX-64-NEXT: retq
%2 = zext <3 x i8> %0 to <3 x i16>
ret <3 x i16> %2
@@ -85,9 +85,9 @@ define <3 x i16> @sext_i8(<3 x i8>) {
; SSE3-NEXT: movd %xmm0, %eax
; SSE3-NEXT: pextrw $2, %xmm0, %edx
; SSE3-NEXT: pextrw $4, %xmm0, %ecx
-; SSE3-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; SSE3-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
-; SSE3-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
+; SSE3-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
+; SSE3-NEXT: # kill: %dx<def> %dx<kill> %edx<kill>
+; SSE3-NEXT: # kill: %cx<def> %cx<kill> %ecx<kill>
; SSE3-NEXT: retl
;
; SSE41-LABEL: sext_i8:
@@ -100,9 +100,9 @@ define <3 x i16> @sext_i8(<3 x i8>) {
; SSE41-NEXT: movd %xmm0, %eax
; SSE41-NEXT: pextrw $2, %xmm0, %edx
; SSE41-NEXT: pextrw $4, %xmm0, %ecx
-; SSE41-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; SSE41-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
-; SSE41-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
+; SSE41-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
+; SSE41-NEXT: # kill: %dx<def> %dx<kill> %edx<kill>
+; SSE41-NEXT: # kill: %cx<def> %cx<kill> %ecx<kill>
; SSE41-NEXT: retl
;
; AVX-32-LABEL: sext_i8:
@@ -115,9 +115,9 @@ define <3 x i16> @sext_i8(<3 x i8>) {
; AVX-32-NEXT: vmovd %xmm0, %eax
; AVX-32-NEXT: vpextrw $2, %xmm0, %edx
; AVX-32-NEXT: vpextrw $4, %xmm0, %ecx
-; AVX-32-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; AVX-32-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
-; AVX-32-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
+; AVX-32-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
+; AVX-32-NEXT: # kill: %dx<def> %dx<kill> %edx<kill>
+; AVX-32-NEXT: # kill: %cx<def> %cx<kill> %ecx<kill>
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: sext_i8:
@@ -130,9 +130,9 @@ define <3 x i16> @sext_i8(<3 x i8>) {
; AVX-64-NEXT: vmovd %xmm0, %eax
; AVX-64-NEXT: vpextrw $2, %xmm0, %edx
; AVX-64-NEXT: vpextrw $4, %xmm0, %ecx
-; AVX-64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; AVX-64-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill>
-; AVX-64-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill>
+; AVX-64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
+; AVX-64-NEXT: # kill: %dx<def> %dx<kill> %edx<kill>
+; AVX-64-NEXT: # kill: %cx<def> %cx<kill> %ecx<kill>
; AVX-64-NEXT: retq
%2 = sext <3 x i8> %0 to <3 x i16>
ret <3 x i16> %2
Modified: llvm/trunk/test/CodeGen/X86/psubus.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/psubus.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/psubus.ll (original)
+++ llvm/trunk/test/CodeGen/X86/psubus.ll Tue Nov 28 09:15:09 2017
@@ -1925,7 +1925,7 @@ define <8 x i16> @psubus_8i64_max(<8 x i
; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
Modified: llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll Tue Nov 28 09:15:09 2017
@@ -43,7 +43,7 @@ define <8 x i16> @trunc_shl_v8i16_v8i32(
; AVX2-NEXT: vpslld $17, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
%shl = shl <8 x i32> %a, <i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17>
Modified: llvm/trunk/test/CodeGen/X86/remat-phys-dead.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/remat-phys-dead.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/remat-phys-dead.ll (original)
+++ llvm/trunk/test/CodeGen/X86/remat-phys-dead.ll Tue Nov 28 09:15:09 2017
@@ -4,12 +4,12 @@
; We need to make sure that rematerialization into a physical register marks the
; super- or sub-register as dead after this rematerialization since only the
; original register is actually used later. Largely irrelevant for a trivial
-; example like this, since EAX is never used again, but easy to test.
+; example like this, since eax is never used again, but easy to test.
define i8 @test_remat() {
ret i8 0
; CHECK: REGISTER COALESCING
-; CHECK: Remat: %EAX<def,dead> = MOV32r0 %EFLAGS<imp-def,dead>, %AL<imp-def>
+; CHECK: Remat: %eax<def,dead> = MOV32r0 %eflags<imp-def,dead>, %al<imp-def>
}
; On the other hand, if it's already the correct width, we really shouldn't be
@@ -18,6 +18,6 @@ define i8 @test_remat() {
define i32 @test_remat32() {
ret i32 0
; CHECK: REGISTER COALESCING
-; CHECK: Remat: %EAX<def> = MOV32r0 %EFLAGS<imp-def,dead>
+; CHECK: Remat: %eax<def> = MOV32r0 %eflags<imp-def,dead>
}
Modified: llvm/trunk/test/CodeGen/X86/sar_fold64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sar_fold64.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sar_fold64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sar_fold64.ll Tue Nov 28 09:15:09 2017
@@ -6,7 +6,7 @@ define i32 @shl48sar47(i64 %a) #0 {
; CHECK: # BB#0:
; CHECK-NEXT: movswq %di, %rax
; CHECK-NEXT: addl %eax, %eax
-; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; CHECK-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; CHECK-NEXT: retq
%1 = shl i64 %a, 48
%2 = ashr exact i64 %1, 47
@@ -19,7 +19,7 @@ define i32 @shl48sar49(i64 %a) #0 {
; CHECK: # BB#0:
; CHECK-NEXT: movswq %di, %rax
; CHECK-NEXT: shrq %rax
-; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; CHECK-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; CHECK-NEXT: retq
%1 = shl i64 %a, 48
%2 = ashr exact i64 %1, 49
@@ -32,7 +32,7 @@ define i32 @shl56sar55(i64 %a) #0 {
; CHECK: # BB#0:
; CHECK-NEXT: movsbq %dil, %rax
; CHECK-NEXT: addl %eax, %eax
-; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; CHECK-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; CHECK-NEXT: retq
%1 = shl i64 %a, 56
%2 = ashr exact i64 %1, 55
@@ -45,7 +45,7 @@ define i32 @shl56sar57(i64 %a) #0 {
; CHECK: # BB#0:
; CHECK-NEXT: movsbq %dil, %rax
; CHECK-NEXT: shrq %rax
-; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; CHECK-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; CHECK-NEXT: retq
%1 = shl i64 %a, 56
%2 = ashr exact i64 %1, 57
Modified: llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll Tue Nov 28 09:15:09 2017
@@ -23,7 +23,7 @@ define i16 @test_bsf16(i16 %a0, i16* %a1
; GENERIC-NEXT: bsfw (%rsi), %cx # sched: [8:1.00]
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; GENERIC-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_bsf16:
@@ -33,7 +33,7 @@ define i16 @test_bsf16(i16 %a0, i16* %a1
; ATOM-NEXT: bsfw (%rsi), %cx # sched: [16:8.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: orl %ecx, %eax # sched: [1:0.50]
-; ATOM-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; ATOM-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_bsf16:
@@ -43,7 +43,7 @@ define i16 @test_bsf16(i16 %a0, i16* %a1
; SLM-NEXT: bsfw (%rsi), %cx # sched: [4:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: orl %ecx, %eax # sched: [1:0.50]
-; SLM-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SLM-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_bsf16:
@@ -53,7 +53,7 @@ define i16 @test_bsf16(i16 %a0, i16* %a1
; SANDY-NEXT: bsfw (%rsi), %cx # sched: [8:1.00]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: orl %ecx, %eax # sched: [1:0.33]
-; SANDY-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SANDY-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_bsf16:
@@ -63,7 +63,7 @@ define i16 @test_bsf16(i16 %a0, i16* %a1
; HASWELL-NEXT: bsfw (%rsi), %cx # sched: [3:1.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; HASWELL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; HASWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_bsf16:
@@ -73,7 +73,7 @@ define i16 @test_bsf16(i16 %a0, i16* %a1
; BROADWELL-NEXT: bsfw (%rsi), %cx # sched: [8:1.00]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; BROADWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_bsf16:
@@ -83,7 +83,7 @@ define i16 @test_bsf16(i16 %a0, i16* %a1
; SKYLAKE-NEXT: bsfw (%rsi), %cx # sched: [8:1.00]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SKYLAKE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_bsf16:
@@ -93,7 +93,7 @@ define i16 @test_bsf16(i16 %a0, i16* %a1
; SKX-NEXT: bsfw (%rsi), %cx # sched: [8:1.00]
; SKX-NEXT: #NO_APP
; SKX-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; SKX-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SKX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_bsf16:
@@ -103,7 +103,7 @@ define i16 @test_bsf16(i16 %a0, i16* %a1
; BTVER2-NEXT: bsfw (%rsi), %cx # sched: [4:1.00]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: orl %ecx, %eax # sched: [1:0.50]
-; BTVER2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; BTVER2-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_bsf16:
@@ -113,7 +113,7 @@ define i16 @test_bsf16(i16 %a0, i16* %a1
; ZNVER1-NEXT: bsfw (%rsi), %cx # sched: [7:0.50]
; ZNVER1-NEXT: #NO_APP
; ZNVER1-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; ZNVER1-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; ZNVER1-NEXT: retq # sched: [1:0.50]
%1 = call { i16, i16 } asm sideeffect "bsf $2, $0 \0A\09 bsf $3, $1", "=r,=r,r,*m,~{dirflag},~{fpsr},~{flags}"(i16 %a0, i16* %a1)
%2 = extractvalue { i16, i16 } %1, 0
@@ -322,7 +322,7 @@ define i16 @test_bsr16(i16 %a0, i16* %a1
; GENERIC-NEXT: bsrw (%rsi), %cx # sched: [8:1.00]
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
-; GENERIC-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; GENERIC-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_bsr16:
@@ -332,7 +332,7 @@ define i16 @test_bsr16(i16 %a0, i16* %a1
; ATOM-NEXT: bsrw (%rsi), %cx # sched: [16:8.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: orl %ecx, %eax # sched: [1:0.50]
-; ATOM-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; ATOM-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_bsr16:
@@ -342,7 +342,7 @@ define i16 @test_bsr16(i16 %a0, i16* %a1
; SLM-NEXT: bsrw (%rsi), %cx # sched: [4:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: orl %ecx, %eax # sched: [1:0.50]
-; SLM-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SLM-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_bsr16:
@@ -352,7 +352,7 @@ define i16 @test_bsr16(i16 %a0, i16* %a1
; SANDY-NEXT: bsrw (%rsi), %cx # sched: [8:1.00]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: orl %ecx, %eax # sched: [1:0.33]
-; SANDY-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SANDY-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_bsr16:
@@ -362,7 +362,7 @@ define i16 @test_bsr16(i16 %a0, i16* %a1
; HASWELL-NEXT: bsrw (%rsi), %cx # sched: [3:1.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; HASWELL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; HASWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_bsr16:
@@ -372,7 +372,7 @@ define i16 @test_bsr16(i16 %a0, i16* %a1
; BROADWELL-NEXT: bsrw (%rsi), %cx # sched: [8:1.00]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; BROADWELL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; BROADWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_bsr16:
@@ -382,7 +382,7 @@ define i16 @test_bsr16(i16 %a0, i16* %a1
; SKYLAKE-NEXT: bsrw (%rsi), %cx # sched: [8:1.00]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; SKYLAKE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SKYLAKE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_bsr16:
@@ -392,7 +392,7 @@ define i16 @test_bsr16(i16 %a0, i16* %a1
; SKX-NEXT: bsrw (%rsi), %cx # sched: [8:1.00]
; SKX-NEXT: #NO_APP
; SKX-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; SKX-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SKX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_bsr16:
@@ -402,7 +402,7 @@ define i16 @test_bsr16(i16 %a0, i16* %a1
; BTVER2-NEXT: bsrw (%rsi), %cx # sched: [4:1.00]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: orl %ecx, %eax # sched: [1:0.50]
-; BTVER2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; BTVER2-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_bsr16:
@@ -412,7 +412,7 @@ define i16 @test_bsr16(i16 %a0, i16* %a1
; ZNVER1-NEXT: bsrw (%rsi), %cx # sched: [7:0.50]
; ZNVER1-NEXT: #NO_APP
; ZNVER1-NEXT: orl %ecx, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; ZNVER1-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; ZNVER1-NEXT: retq # sched: [1:0.50]
%1 = call { i16, i16 } asm sideeffect "bsr $2, $0 \0A\09 bsr $3, $1", "=r,=r,r,*m,~{dirflag},~{fpsr},~{flags}"(i16 %a0, i16* %a1)
%2 = extractvalue { i16, i16 } %1, 0
Modified: llvm/trunk/test/CodeGen/X86/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/select.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/select.ll (original)
+++ llvm/trunk/test/CodeGen/X86/select.ll Tue Nov 28 09:15:09 2017
@@ -145,7 +145,7 @@ define signext i8 @test4(i8* nocapture %
; MCU-NEXT: fucompp
; MCU-NEXT: fnstsw %ax
; MCU-NEXT: xorl %edx, %edx
-; MCU-NEXT: # kill: %AH<def> %AH<kill> %AX<kill>
+; MCU-NEXT: # kill: %ah<def> %ah<kill> %ax<kill>
; MCU-NEXT: sahf
; MCU-NEXT: seta %dl
; MCU-NEXT: movb (%ecx,%edx,4), %al
@@ -798,14 +798,14 @@ define i16 @test17(i16 %x) nounwind {
; GENERIC: ## BB#0: ## %entry
; GENERIC-NEXT: negw %di
; GENERIC-NEXT: sbbl %eax, %eax
-; GENERIC-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; GENERIC-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; GENERIC-NEXT: retq
;
; ATOM-LABEL: test17:
; ATOM: ## BB#0: ## %entry
; ATOM-NEXT: negw %di
; ATOM-NEXT: sbbl %eax, %eax
-; ATOM-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; ATOM-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; ATOM-NEXT: nop
; ATOM-NEXT: nop
; ATOM-NEXT: nop
@@ -816,7 +816,7 @@ define i16 @test17(i16 %x) nounwind {
; MCU: # BB#0: # %entry
; MCU-NEXT: negw %ax
; MCU-NEXT: sbbl %eax, %eax
-; MCU-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; MCU-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; MCU-NEXT: retl
entry:
%cmp = icmp ne i16 %x, 0
@@ -1027,7 +1027,7 @@ define void @test19() {
; MCU-NEXT: cmpl %eax, %ecx
; MCU-NEXT: fucom %st(0)
; MCU-NEXT: fnstsw %ax
-; MCU-NEXT: # kill: %AH<def> %AH<kill> %AX<kill>
+; MCU-NEXT: # kill: %ah<def> %ah<kill> %ax<kill>
; MCU-NEXT: sahf
; MCU-NEXT: jp .LBB24_4
; MCU-NEXT: # BB#5: # %CF244
@@ -1073,7 +1073,7 @@ define i16 @select_xor_1(i16 %A, i8 %con
; MCU-NEXT: negl %edx
; MCU-NEXT: andl $43, %edx
; MCU-NEXT: xorl %edx, %eax
-; MCU-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; MCU-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; MCU-NEXT: retl
entry:
%and = and i8 %cond, 1
Modified: llvm/trunk/test/CodeGen/X86/select_const.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/select_const.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/select_const.ll (original)
+++ llvm/trunk/test/CodeGen/X86/select_const.ll Tue Nov 28 09:15:09 2017
@@ -74,7 +74,7 @@ define i32 @select_1_or_0_signext(i1 sig
define i32 @select_0_or_neg1(i1 %cond) {
; CHECK-LABEL: select_0_or_neg1:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: leal -1(%rdi), %eax
; CHECK-NEXT: retq
@@ -85,7 +85,7 @@ define i32 @select_0_or_neg1(i1 %cond) {
define i32 @select_0_or_neg1_zeroext(i1 zeroext %cond) {
; CHECK-LABEL: select_0_or_neg1_zeroext:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal -1(%rdi), %eax
; CHECK-NEXT: retq
%sel = select i1 %cond, i32 0, i32 -1
@@ -139,7 +139,7 @@ define i32 @select_neg1_or_0_signext(i1
define i32 @select_Cplus1_C(i1 %cond) {
; CHECK-LABEL: select_Cplus1_C:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: leal 41(%rdi), %eax
; CHECK-NEXT: retq
@@ -150,7 +150,7 @@ define i32 @select_Cplus1_C(i1 %cond) {
define i32 @select_Cplus1_C_zeroext(i1 zeroext %cond) {
; CHECK-LABEL: select_Cplus1_C_zeroext:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal 41(%rdi), %eax
; CHECK-NEXT: retq
%sel = select i1 %cond, i32 42, i32 41
@@ -287,7 +287,7 @@ define i16 @sel_neg1_1(i32 %x) {
; CHECK-NEXT: cmpl $43, %edi
; CHECK-NEXT: setl %al
; CHECK-NEXT: leal -1(,%rax,4), %eax
-; CHECK-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; CHECK-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; CHECK-NEXT: retq
%cmp = icmp sgt i32 %x, 42
%sel = select i1 %cmp, i16 -1, i16 3
@@ -344,7 +344,7 @@ define i16 @select_pow2_diff_invert(i1 z
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: shll $6, %eax
; CHECK-NEXT: orl $7, %eax
-; CHECK-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; CHECK-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; CHECK-NEXT: retq
%sel = select i1 %cond, i16 7, i16 71
ret i16 %sel
Modified: llvm/trunk/test/CodeGen/X86/setcc-lowering.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/setcc-lowering.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/setcc-lowering.ll (original)
+++ llvm/trunk/test/CodeGen/X86/setcc-lowering.ll Tue Nov 28 09:15:09 2017
@@ -23,7 +23,7 @@ define <8 x i16> @pr25080(<8 x i32> %a)
;
; KNL-32-LABEL: pr25080:
; KNL-32: # BB#0: # %entry
-; KNL-32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL-32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL-32-NEXT: vpbroadcastd {{.*#+}} ymm1 = [8388607,8388607,8388607,8388607,8388607,8388607,8388607,8388607]
; KNL-32-NEXT: vptestnmd %zmm1, %zmm0, %k0
; KNL-32-NEXT: movb $15, %al
Modified: llvm/trunk/test/CodeGen/X86/sext-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sext-i1.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sext-i1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sext-i1.ll Tue Nov 28 09:15:09 2017
@@ -124,7 +124,7 @@ define i32 @select_0_or_1s(i1 %cond) {
;
; X64-LABEL: select_0_or_1s:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: andl $1, %edi
; X64-NEXT: leal -1(%rdi), %eax
; X64-NEXT: retq
@@ -144,7 +144,7 @@ define i32 @select_0_or_1s_zeroext(i1 ze
;
; X64-LABEL: select_0_or_1s_zeroext:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal -1(%rdi), %eax
; X64-NEXT: retq
%not = xor i1 %cond, 1
Modified: llvm/trunk/test/CodeGen/X86/sha.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sha.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sha.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sha.ll Tue Nov 28 09:15:09 2017
@@ -84,9 +84,9 @@ entry:
%0 = tail call <4 x i32> @llvm.x86.sha256rnds2(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
ret <4 x i32> %0
; CHECK: test_sha256rnds2rr
- ; CHECK: movaps %xmm0, [[XMM_TMP1:%xmm[1-9][0-9]?]]
+ ; CHECK: movaps %xmm0, [[xmm_TMP1:%xmm[1-9][0-9]?]]
; CHECK: movaps %xmm2, %xmm0
- ; CHECK: sha256rnds2 %xmm0, %xmm1, [[XMM_TMP1]]
+ ; CHECK: sha256rnds2 %xmm0, %xmm1, [[xmm_TMP1]]
}
define <4 x i32> @test_sha256rnds2rm(<4 x i32> %a, <4 x i32>* %b, <4 x i32> %c) nounwind uwtable {
@@ -95,9 +95,9 @@ entry:
%1 = tail call <4 x i32> @llvm.x86.sha256rnds2(<4 x i32> %a, <4 x i32> %0, <4 x i32> %c)
ret <4 x i32> %1
; CHECK: test_sha256rnds2rm
- ; CHECK: movaps %xmm0, [[XMM_TMP2:%xmm[1-9][0-9]?]]
+ ; CHECK: movaps %xmm0, [[xmm_TMP2:%xmm[1-9][0-9]?]]
; CHECK: movaps %xmm1, %xmm0
- ; CHECK: sha256rnds2 %xmm0, (%rdi), [[XMM_TMP2]]
+ ; CHECK: sha256rnds2 %xmm0, (%rdi), [[xmm_TMP2]]
}
declare <4 x i32> @llvm.x86.sha256msg1(<4 x i32>, <4 x i32>) nounwind readnone
Modified: llvm/trunk/test/CodeGen/X86/shift-combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-combine.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-combine.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-combine.ll Tue Nov 28 09:15:09 2017
@@ -14,7 +14,7 @@ define i32 @test_lshr_and(i32 %x) {
;
; X64-LABEL: test_lshr_and:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: shrl $2, %edi
; X64-NEXT: andl $3, %edi
; X64-NEXT: movl array(,%rdi,4), %eax
@@ -102,7 +102,7 @@ define i32* @test_exact4(i32 %a, i32 %b,
;
; X64-LABEL: test_exact4:
; X64: # BB#0:
-; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
+; X64-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; X64-NEXT: subl %edi, %esi
; X64-NEXT: shrl $3, %esi
; X64-NEXT: leaq (%rdx,%rsi,4), %rax
@@ -124,7 +124,7 @@ define i32* @test_exact5(i32 %a, i32 %b,
;
; X64-LABEL: test_exact5:
; X64: # BB#0:
-; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
+; X64-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; X64-NEXT: subl %edi, %esi
; X64-NEXT: shrl $3, %esi
; X64-NEXT: leaq (%rdx,%rsi,4), %rax
@@ -145,7 +145,7 @@ define i32* @test_exact6(i32 %a, i32 %b,
;
; X64-LABEL: test_exact6:
; X64: # BB#0:
-; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
+; X64-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; X64-NEXT: subl %edi, %esi
; X64-NEXT: leaq (%rsi,%rdx), %rax
; X64-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/shift-double.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-double.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-double.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-double.ll Tue Nov 28 09:15:09 2017
@@ -278,7 +278,7 @@ define i32 @test11(i32 %hi, i32 %lo, i32
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: andl $31, %ecx
-; X86-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X86-NEXT: # kill: %cl<def> %cl<kill> %ecx<kill>
; X86-NEXT: shldl %cl, %edx, %eax
; X86-NEXT: retl
;
@@ -304,7 +304,7 @@ define i32 @test12(i32 %hi, i32 %lo, i32
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: andl $31, %ecx
-; X86-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X86-NEXT: # kill: %cl<def> %cl<kill> %ecx<kill>
; X86-NEXT: shrdl %cl, %edx, %eax
; X86-NEXT: retl
;
Modified: llvm/trunk/test/CodeGen/X86/shrink-compare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shrink-compare.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shrink-compare.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shrink-compare.ll Tue Nov 28 09:15:09 2017
@@ -72,11 +72,11 @@ define i1 @test4(i64 %a, i32 %b) {
; CHECK-NEXT: testl %esi, %esi
; CHECK-NEXT: je .LBB3_1
; CHECK-NEXT: # BB#2: # %lor.end
-; CHECK-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; CHECK-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB3_1: # %lor.rhs
; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; CHECK-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; CHECK-NEXT: retq
entry:
%tobool = icmp ne i32 %b, 0
Modified: llvm/trunk/test/CodeGen/X86/shuffle-vs-trunc-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shuffle-vs-trunc-256.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shuffle-vs-trunc-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shuffle-vs-trunc-256.ll Tue Nov 28 09:15:09 2017
@@ -760,7 +760,7 @@ define <16 x i8> @negative(<32 x i8> %v,
; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -770,7 +770,7 @@ define <16 x i8> @negative(<32 x i8> %v,
; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
; AVX512F-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX512F-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -780,7 +780,7 @@ define <16 x i8> @negative(<32 x i8> %v,
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
; AVX512VL-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
-; AVX512VL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512VL-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq
;
@@ -790,7 +790,7 @@ define <16 x i8> @negative(<32 x i8> %v,
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
; AVX512BW-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX512BW-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -801,7 +801,7 @@ define <16 x i8> @negative(<32 x i8> %v,
; AVX512BWVL-NEXT: kmovd %eax, %k1
; AVX512BWVL-NEXT: vmovdqu8 %ymm1, %ymm0 {%k1}
; AVX512BWVL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
-; AVX512BWVL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BWVL-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BWVL-NEXT: vzeroupper
; AVX512BWVL-NEXT: retq
%strided.vec = shufflevector <32 x i8> %v, <32 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
Modified: llvm/trunk/test/CodeGen/X86/sjlj-eh.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sjlj-eh.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sjlj-eh.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sjlj-eh.ll Tue Nov 28 09:15:09 2017
@@ -41,9 +41,9 @@ try.cont:
; CHECK: movl $___gxx_personality_sj0, -40(%ebp)
; UFC.__lsda = $LSDA
; CHECK: movl $[[LSDA:GCC_except_table[0-9]+]], -36(%ebp)
-; UFC.__jbuf[0] = $EBP
+; UFC.__jbuf[0] = $ebp
; CHECK: movl %ebp, -32(%ebp)
-; UFC.__jbuf[2] = $ESP
+; UFC.__jbuf[2] = $esp
; CHECK: movl %esp, -24(%ebp)
; UFC.__jbuf[1] = $EIP
; CHECK: movl $[[RESUME:LBB[0-9]+_[0-9]+]], -28(%ebp)
@@ -91,9 +91,9 @@ try.cont:
; UFC.__lsda = $LSDA
; CHECK-X64: leaq [[LSDA:GCC_except_table[0-9]+]](%rip), %rax
; CHECK-X64: movq %rax, -272(%rbp)
-; UFC.__jbuf[0] = $RBP
+; UFC.__jbuf[0] = $rbp
; CHECK-X64: movq %rbp, -264(%rbp)
-; UFC.__jbuf[2] = $RSP
+; UFC.__jbuf[2] = $rsp
; CHECK-X64: movq %rsp, -248(%rbp)
; UFC.__jbuf[1] = $RIP
; CHECK-X64: leaq .[[RESUME:LBB[0-9]+_[0-9]+]](%rip), %rax
Modified: llvm/trunk/test/CodeGen/X86/sse-regcall.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-regcall.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-regcall.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-regcall.ll Tue Nov 28 09:15:09 2017
@@ -75,7 +75,7 @@ define x86_regcallcc i1 @test_CallargRet
; LINUXOSX: movaps {{.*(%r(b|s)p).*}}, {{%xmm(1[2-5])}} {{#+}} 16-byte Reload
; LINUXOSX: retq
-;test calling conventions - input parameters, callee saved XMMs
+;test calling conventions - input parameters, callee saved xmms
define x86_regcallcc <16 x float> @testf32_inp(<16 x float> %a, <16 x float> %b, <16 x float> %c) nounwind {
%x1 = fadd <16 x float> %a, %b
%x2 = fmul <16 x float> %a, %b
Modified: llvm/trunk/test/CodeGen/X86/sse2-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse2-schedule.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse2-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse2-schedule.ll Tue Nov 28 09:15:09 2017
@@ -5485,61 +5485,61 @@ define i16 @test_pextrw(<8 x i16> %a0) {
; GENERIC-LABEL: test_pextrw:
; GENERIC: # BB#0:
; GENERIC-NEXT: pextrw $6, %xmm0, %eax # sched: [3:1.00]
-; GENERIC-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; GENERIC-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pextrw:
; ATOM: # BB#0:
; ATOM-NEXT: pextrw $6, %xmm0, %eax # sched: [4:2.00]
-; ATOM-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; ATOM-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pextrw:
; SLM: # BB#0:
; SLM-NEXT: pextrw $6, %xmm0, %eax # sched: [4:1.00]
-; SLM-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SLM-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pextrw:
; SANDY: # BB#0:
; SANDY-NEXT: vpextrw $6, %xmm0, %eax # sched: [3:1.00]
-; SANDY-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SANDY-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pextrw:
; HASWELL: # BB#0:
; HASWELL-NEXT: vpextrw $6, %xmm0, %eax # sched: [2:1.00]
-; HASWELL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; HASWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pextrw:
; BROADWELL: # BB#0:
; BROADWELL-NEXT: vpextrw $6, %xmm0, %eax # sched: [2:1.00]
-; BROADWELL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; BROADWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pextrw:
; SKYLAKE: # BB#0:
; SKYLAKE-NEXT: vpextrw $6, %xmm0, %eax # sched: [3:1.00]
-; SKYLAKE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SKYLAKE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pextrw:
; SKX: # BB#0:
; SKX-NEXT: vpextrw $6, %xmm0, %eax # sched: [3:1.00]
-; SKX-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SKX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pextrw:
; BTVER2: # BB#0:
; BTVER2-NEXT: vpextrw $6, %xmm0, %eax # sched: [1:0.50]
-; BTVER2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; BTVER2-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pextrw:
; ZNVER1: # BB#0:
; ZNVER1-NEXT: vpextrw $6, %xmm0, %eax # sched: [1:0.25]
-; ZNVER1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; ZNVER1-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; ZNVER1-NEXT: retq # sched: [1:0.50]
%1 = extractelement <8 x i16> %a0, i32 6
ret i16 %1
Modified: llvm/trunk/test/CodeGen/X86/sse42-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse42-schedule.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse42-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse42-schedule.ll Tue Nov 28 09:15:09 2017
@@ -370,7 +370,7 @@ define i32 @test_pcmpestri(<16 x i8> %a0
; GENERIC-NEXT: movl $7, %eax # sched: [1:0.33]
; GENERIC-NEXT: movl $7, %edx # sched: [1:0.33]
; GENERIC-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [4:2.33]
-; GENERIC-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; GENERIC-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; GENERIC-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
@@ -383,7 +383,7 @@ define i32 @test_pcmpestri(<16 x i8> %a0
; SLM-NEXT: movl $7, %edx # sched: [1:0.50]
; SLM-NEXT: movl %ecx, %esi # sched: [1:0.50]
; SLM-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [21:21.00]
-; SLM-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; SLM-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SLM-NEXT: leal (%rcx,%rsi), %eax # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
@@ -396,7 +396,7 @@ define i32 @test_pcmpestri(<16 x i8> %a0
; SANDY-NEXT: movl $7, %eax # sched: [1:0.33]
; SANDY-NEXT: movl $7, %edx # sched: [1:0.33]
; SANDY-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [4:2.33]
-; SANDY-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; SANDY-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SANDY-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
; SANDY-NEXT: retq # sched: [1:1.00]
;
@@ -409,7 +409,7 @@ define i32 @test_pcmpestri(<16 x i8> %a0
; HASWELL-NEXT: movl $7, %eax # sched: [1:0.25]
; HASWELL-NEXT: movl $7, %edx # sched: [1:0.25]
; HASWELL-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [18:4.00]
-; HASWELL-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; HASWELL-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; HASWELL-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
@@ -422,7 +422,7 @@ define i32 @test_pcmpestri(<16 x i8> %a0
; BROADWELL-NEXT: movl $7, %eax # sched: [1:0.25]
; BROADWELL-NEXT: movl $7, %edx # sched: [1:0.25]
; BROADWELL-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [23:4.00]
-; BROADWELL-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; BROADWELL-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; BROADWELL-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
@@ -435,7 +435,7 @@ define i32 @test_pcmpestri(<16 x i8> %a0
; SKYLAKE-NEXT: movl $7, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: movl $7, %edx # sched: [1:0.25]
; SKYLAKE-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [24:4.00]
-; SKYLAKE-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; SKYLAKE-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SKYLAKE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
@@ -448,7 +448,7 @@ define i32 @test_pcmpestri(<16 x i8> %a0
; SKX-NEXT: movl $7, %eax # sched: [1:0.25]
; SKX-NEXT: movl $7, %edx # sched: [1:0.25]
; SKX-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [24:4.00]
-; SKX-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; SKX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SKX-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
; SKX-NEXT: retq # sched: [7:1.00]
;
@@ -461,7 +461,7 @@ define i32 @test_pcmpestri(<16 x i8> %a0
; BTVER2-NEXT: movl $7, %edx # sched: [1:0.17]
; BTVER2-NEXT: movl %ecx, %esi # sched: [1:0.17]
; BTVER2-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [19:10.00]
-; BTVER2-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; BTVER2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; BTVER2-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
@@ -474,7 +474,7 @@ define i32 @test_pcmpestri(<16 x i8> %a0
; ZNVER1-NEXT: movl $7, %edx # sched: [1:0.25]
; ZNVER1-NEXT: movl %ecx, %esi # sched: [1:0.25]
; ZNVER1-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [100:?]
-; ZNVER1-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; ZNVER1-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; ZNVER1-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [1:0.50]
%1 = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %a0, i32 7, <16 x i8> %a1, i32 7, i8 7)
@@ -588,7 +588,7 @@ define i32 @test_pcmpistri(<16 x i8> %a0
; GENERIC-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
; GENERIC-NEXT: movl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [17:3.00]
-; GENERIC-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; GENERIC-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; GENERIC-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
@@ -597,7 +597,7 @@ define i32 @test_pcmpistri(<16 x i8> %a0
; SLM-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [17:17.00]
; SLM-NEXT: movl %ecx, %eax # sched: [1:0.50]
; SLM-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [17:17.00]
-; SLM-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; SLM-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SLM-NEXT: leal (%rcx,%rax), %eax # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
@@ -606,7 +606,7 @@ define i32 @test_pcmpistri(<16 x i8> %a0
; SANDY-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
; SANDY-NEXT: movl %ecx, %eax # sched: [1:0.33]
; SANDY-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [17:3.00]
-; SANDY-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; SANDY-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SANDY-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
; SANDY-NEXT: retq # sched: [1:1.00]
;
@@ -615,7 +615,7 @@ define i32 @test_pcmpistri(<16 x i8> %a0
; HASWELL-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
; HASWELL-NEXT: movl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [11:3.00]
-; HASWELL-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; HASWELL-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; HASWELL-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
@@ -624,7 +624,7 @@ define i32 @test_pcmpistri(<16 x i8> %a0
; BROADWELL-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
; BROADWELL-NEXT: movl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [16:3.00]
-; BROADWELL-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; BROADWELL-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; BROADWELL-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
@@ -633,7 +633,7 @@ define i32 @test_pcmpistri(<16 x i8> %a0
; SKYLAKE-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [10:3.00]
; SKYLAKE-NEXT: movl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [16:3.00]
-; SKYLAKE-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; SKYLAKE-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SKYLAKE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
@@ -642,7 +642,7 @@ define i32 @test_pcmpistri(<16 x i8> %a0
; SKX-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [10:3.00]
; SKX-NEXT: movl %ecx, %eax # sched: [1:0.25]
; SKX-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [16:3.00]
-; SKX-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; SKX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SKX-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
; SKX-NEXT: retq # sched: [7:1.00]
;
@@ -651,7 +651,7 @@ define i32 @test_pcmpistri(<16 x i8> %a0
; BTVER2-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [7:2.00]
; BTVER2-NEXT: movl %ecx, %eax # sched: [1:0.17]
; BTVER2-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [12:2.00]
-; BTVER2-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; BTVER2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; BTVER2-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
@@ -660,7 +660,7 @@ define i32 @test_pcmpistri(<16 x i8> %a0
; ZNVER1-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [100:?]
; ZNVER1-NEXT: movl %ecx, %eax # sched: [1:0.25]
; ZNVER1-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [100:?]
-; ZNVER1-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; ZNVER1-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; ZNVER1-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [1:0.50]
%1 = call i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %a0, <16 x i8> %a1, i8 7)
Modified: llvm/trunk/test/CodeGen/X86/stackmap-fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stackmap-fast-isel.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stackmap-fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stackmap-fast-isel.ll Tue Nov 28 09:15:09 2017
@@ -157,7 +157,7 @@ define void @liveConstant() {
; CHECK-NEXT: .short 0
; 1 location
; CHECK-NEXT: .short 1
-; Loc 0: Direct RBP - ofs
+; Loc 0: Direct rbp - ofs
; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 8
Modified: llvm/trunk/test/CodeGen/X86/stackmap-liveness.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stackmap-liveness.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stackmap-liveness.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stackmap-liveness.ll Tue Nov 28 09:15:09 2017
@@ -48,7 +48,7 @@ entry:
; PATCH-NEXT: .short 0
; Num LiveOut Entries: 1
; PATCH-NEXT: .short 1
-; LiveOut Entry 1: %YMM2 (16 bytes) --> %XMM2
+; LiveOut Entry 1: %ymm2 (16 bytes) --> %xmm2
; PATCH-NEXT: .short 19
; PATCH-NEXT: .byte 0
; PATCH-NEXT: .byte 16
@@ -81,23 +81,23 @@ entry:
; PATCH-NEXT: .short 0
; Num LiveOut Entries: 5
; PATCH-NEXT: .short 5
-; LiveOut Entry 1: %RAX (1 bytes) --> %AL or %AH
+; LiveOut Entry 1: %rax (1 bytes) --> %al or %ah
; PATCH-NEXT: .short 0
; PATCH-NEXT: .byte 0
; PATCH-NEXT: .byte 1
-; LiveOut Entry 2: %R8 (8 bytes)
+; LiveOut Entry 2: %r8 (8 bytes)
; PATCH-NEXT: .short 8
; PATCH-NEXT: .byte 0
; PATCH-NEXT: .byte 8
-; LiveOut Entry 3: %YMM0 (32 bytes)
+; LiveOut Entry 3: %ymm0 (32 bytes)
; PATCH-NEXT: .short 17
; PATCH-NEXT: .byte 0
; PATCH-NEXT: .byte 32
-; LiveOut Entry 4: %YMM1 (32 bytes)
+; LiveOut Entry 4: %ymm1 (32 bytes)
; PATCH-NEXT: .short 18
; PATCH-NEXT: .byte 0
; PATCH-NEXT: .byte 32
-; LiveOut Entry 5: %YMM2 (16 bytes) --> %XMM2
+; LiveOut Entry 5: %ymm2 (16 bytes) --> %xmm2
; PATCH-NEXT: .short 19
; PATCH-NEXT: .byte 0
; PATCH-NEXT: .byte 16
@@ -127,11 +127,11 @@ entry:
; PATCH-NEXT: .short 0
; Num LiveOut Entries: 2
; PATCH-NEXT: .short 2
-; LiveOut Entry 1: %RSP (8 bytes)
+; LiveOut Entry 1: %rsp (8 bytes)
; PATCH-NEXT: .short 7
; PATCH-NEXT: .byte 0
; PATCH-NEXT: .byte 8
-; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
+; LiveOut Entry 2: %ymm2 (16 bytes) --> %xmm2
; PATCH-NEXT: .short 19
; PATCH-NEXT: .byte 0
; PATCH-NEXT: .byte 16
@@ -166,11 +166,11 @@ entry:
; PATCH-NEXT: .short 0
; Num LiveOut Entries: 2
; PATCH-NEXT: .short 2
-; LiveOut Entry 1: %RSP (8 bytes)
+; LiveOut Entry 1: %rsp (8 bytes)
; PATCH-NEXT: .short 7
; PATCH-NEXT: .byte 0
; PATCH-NEXT: .byte 8
-; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
+; LiveOut Entry 2: %ymm2 (16 bytes) --> %xmm2
; PATCH-NEXT: .short 19
; PATCH-NEXT: .byte 0
; PATCH-NEXT: .byte 16
Modified: llvm/trunk/test/CodeGen/X86/statepoint-allocas.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/statepoint-allocas.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/statepoint-allocas.ll (original)
+++ llvm/trunk/test/CodeGen/X86/statepoint-allocas.ll Tue Nov 28 09:15:09 2017
@@ -96,7 +96,7 @@ declare token @llvm.experimental.gc.stat
; CHECK: .short 0
; CHECK: .short 0
; CHECK: .long 0
-; Direct Spill Slot [RSP+0]
+; Direct Spill Slot [rsp+0]
; CHECK: .byte 2
; CHECK: .byte 0
; CHECK: .short 8
@@ -133,7 +133,7 @@ declare token @llvm.experimental.gc.stat
; CHECK: .short 0
; CHECK: .short 0
; CHECK: .long 1
-; Direct Spill Slot [RSP+0]
+; Direct Spill Slot [rsp+0]
; CHECK: .byte 2
; CHECK: .byte 0
; CHECK: .short 8
Modified: llvm/trunk/test/CodeGen/X86/subvector-broadcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/subvector-broadcast.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/subvector-broadcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/subvector-broadcast.ll Tue Nov 28 09:15:09 2017
@@ -1145,13 +1145,13 @@ entry:
define <4 x double> @reg_broadcast_2f64_4f64(<2 x double> %a0) nounwind {
; X32-LABEL: reg_broadcast_2f64_4f64:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: reg_broadcast_2f64_4f64:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-NEXT: retq
%1 = shufflevector <2 x double> %a0, <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@@ -1161,28 +1161,28 @@ define <4 x double> @reg_broadcast_2f64_
define <8 x double> @reg_broadcast_2f64_8f64(<2 x double> %a0) nounwind {
; X32-AVX-LABEL: reg_broadcast_2f64_8f64:
; X32-AVX: # BB#0:
-; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
; X32-AVX-NEXT: retl
;
; X32-AVX512-LABEL: reg_broadcast_2f64_8f64:
; X32-AVX512: # BB#0:
-; X32-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512-NEXT: retl
;
; X64-AVX-LABEL: reg_broadcast_2f64_8f64:
; X64-AVX: # BB#0:
-; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
; X64-AVX-NEXT: retq
;
; X64-AVX512-LABEL: reg_broadcast_2f64_8f64:
; X64-AVX512: # BB#0:
-; X64-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512-NEXT: retq
@@ -1198,7 +1198,7 @@ define <8 x double> @reg_broadcast_4f64_
;
; X32-AVX512-LABEL: reg_broadcast_4f64_8f64:
; X32-AVX512: # BB#0:
-; X32-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512-NEXT: retl
;
@@ -1209,7 +1209,7 @@ define <8 x double> @reg_broadcast_4f64_
;
; X64-AVX512-LABEL: reg_broadcast_4f64_8f64:
; X64-AVX512: # BB#0:
-; X64-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512-NEXT: retq
%1 = shufflevector <4 x double> %a0, <4 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
@@ -1219,13 +1219,13 @@ define <8 x double> @reg_broadcast_4f64_
define <4 x i64> @reg_broadcast_2i64_4i64(<2 x i64> %a0) nounwind {
; X32-LABEL: reg_broadcast_2i64_4i64:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: reg_broadcast_2i64_4i64:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-NEXT: retq
%1 = shufflevector <2 x i64> %a0, <2 x i64> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@@ -1235,28 +1235,28 @@ define <4 x i64> @reg_broadcast_2i64_4i6
define <8 x i64> @reg_broadcast_2i64_8i64(<2 x i64> %a0) nounwind {
; X32-AVX-LABEL: reg_broadcast_2i64_8i64:
; X32-AVX: # BB#0:
-; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
; X32-AVX-NEXT: retl
;
; X32-AVX512-LABEL: reg_broadcast_2i64_8i64:
; X32-AVX512: # BB#0:
-; X32-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512-NEXT: retl
;
; X64-AVX-LABEL: reg_broadcast_2i64_8i64:
; X64-AVX: # BB#0:
-; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
; X64-AVX-NEXT: retq
;
; X64-AVX512-LABEL: reg_broadcast_2i64_8i64:
; X64-AVX512: # BB#0:
-; X64-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512-NEXT: retq
@@ -1272,7 +1272,7 @@ define <8 x i64> @reg_broadcast_4i64_8i6
;
; X32-AVX512-LABEL: reg_broadcast_4i64_8i64:
; X32-AVX512: # BB#0:
-; X32-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512-NEXT: retl
;
@@ -1283,7 +1283,7 @@ define <8 x i64> @reg_broadcast_4i64_8i6
;
; X64-AVX512-LABEL: reg_broadcast_4i64_8i64:
; X64-AVX512: # BB#0:
-; X64-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512-NEXT: retq
%1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
@@ -1293,13 +1293,13 @@ define <8 x i64> @reg_broadcast_4i64_8i6
define <8 x float> @reg_broadcast_4f32_8f32(<4 x float> %a0) nounwind {
; X32-LABEL: reg_broadcast_4f32_8f32:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: reg_broadcast_4f32_8f32:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-NEXT: retq
%1 = shufflevector <4 x float> %a0, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
@@ -1309,28 +1309,28 @@ define <8 x float> @reg_broadcast_4f32_8
define <16 x float> @reg_broadcast_4f32_16f32(<4 x float> %a0) nounwind {
; X32-AVX-LABEL: reg_broadcast_4f32_16f32:
; X32-AVX: # BB#0:
-; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
; X32-AVX-NEXT: retl
;
; X32-AVX512-LABEL: reg_broadcast_4f32_16f32:
; X32-AVX512: # BB#0:
-; X32-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512-NEXT: retl
;
; X64-AVX-LABEL: reg_broadcast_4f32_16f32:
; X64-AVX: # BB#0:
-; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
; X64-AVX-NEXT: retq
;
; X64-AVX512-LABEL: reg_broadcast_4f32_16f32:
; X64-AVX512: # BB#0:
-; X64-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512-NEXT: retq
@@ -1346,7 +1346,7 @@ define <16 x float> @reg_broadcast_8f32_
;
; X32-AVX512-LABEL: reg_broadcast_8f32_16f32:
; X32-AVX512: # BB#0:
-; X32-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512-NEXT: retl
;
@@ -1357,7 +1357,7 @@ define <16 x float> @reg_broadcast_8f32_
;
; X64-AVX512-LABEL: reg_broadcast_8f32_16f32:
; X64-AVX512: # BB#0:
-; X64-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512-NEXT: retq
%1 = shufflevector <8 x float> %a0, <8 x float> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
@@ -1367,13 +1367,13 @@ define <16 x float> @reg_broadcast_8f32_
define <8 x i32> @reg_broadcast_4i32_8i32(<4 x i32> %a0) nounwind {
; X32-LABEL: reg_broadcast_4i32_8i32:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: reg_broadcast_4i32_8i32:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-NEXT: retq
%1 = shufflevector <4 x i32> %a0, <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
@@ -1383,28 +1383,28 @@ define <8 x i32> @reg_broadcast_4i32_8i3
define <16 x i32> @reg_broadcast_4i32_16i32(<4 x i32> %a0) nounwind {
; X32-AVX-LABEL: reg_broadcast_4i32_16i32:
; X32-AVX: # BB#0:
-; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
; X32-AVX-NEXT: retl
;
; X32-AVX512-LABEL: reg_broadcast_4i32_16i32:
; X32-AVX512: # BB#0:
-; X32-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512-NEXT: retl
;
; X64-AVX-LABEL: reg_broadcast_4i32_16i32:
; X64-AVX: # BB#0:
-; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
; X64-AVX-NEXT: retq
;
; X64-AVX512-LABEL: reg_broadcast_4i32_16i32:
; X64-AVX512: # BB#0:
-; X64-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512-NEXT: retq
@@ -1420,7 +1420,7 @@ define <16 x i32> @reg_broadcast_8i32_16
;
; X32-AVX512-LABEL: reg_broadcast_8i32_16i32:
; X32-AVX512: # BB#0:
-; X32-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512-NEXT: retl
;
@@ -1431,7 +1431,7 @@ define <16 x i32> @reg_broadcast_8i32_16
;
; X64-AVX512-LABEL: reg_broadcast_8i32_16i32:
; X64-AVX512: # BB#0:
-; X64-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512-NEXT: retq
%1 = shufflevector <8 x i32> %a0, <8 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
@@ -1441,13 +1441,13 @@ define <16 x i32> @reg_broadcast_8i32_16
define <16 x i16> @reg_broadcast_8i16_16i16(<8 x i16> %a0) nounwind {
; X32-LABEL: reg_broadcast_8i16_16i16:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: reg_broadcast_8i16_16i16:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-NEXT: retq
%1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
@@ -1457,56 +1457,56 @@ define <16 x i16> @reg_broadcast_8i16_16
define <32 x i16> @reg_broadcast_8i16_32i16(<8 x i16> %a0) nounwind {
; X32-AVX-LABEL: reg_broadcast_8i16_32i16:
; X32-AVX: # BB#0:
-; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
; X32-AVX-NEXT: retl
;
; X32-AVX512F-LABEL: reg_broadcast_8i16_32i16:
; X32-AVX512F: # BB#0:
-; X32-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
; X32-AVX512F-NEXT: retl
;
; X32-AVX512BW-LABEL: reg_broadcast_8i16_32i16:
; X32-AVX512BW: # BB#0:
-; X32-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512BW-NEXT: retl
;
; X32-AVX512DQ-LABEL: reg_broadcast_8i16_32i16:
; X32-AVX512DQ: # BB#0:
-; X32-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
; X32-AVX512DQ-NEXT: retl
;
; X64-AVX-LABEL: reg_broadcast_8i16_32i16:
; X64-AVX: # BB#0:
-; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
; X64-AVX-NEXT: retq
;
; X64-AVX512F-LABEL: reg_broadcast_8i16_32i16:
; X64-AVX512F: # BB#0:
-; X64-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
; X64-AVX512F-NEXT: retq
;
; X64-AVX512BW-LABEL: reg_broadcast_8i16_32i16:
; X64-AVX512BW: # BB#0:
-; X64-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512BW-NEXT: retq
;
; X64-AVX512DQ-LABEL: reg_broadcast_8i16_32i16:
; X64-AVX512DQ: # BB#0:
-; X64-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
; X64-AVX512DQ-NEXT: retq
@@ -1527,7 +1527,7 @@ define <32 x i16> @reg_broadcast_16i16_3
;
; X32-AVX512BW-LABEL: reg_broadcast_16i16_32i16:
; X32-AVX512BW: # BB#0:
-; X32-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512BW-NEXT: retl
;
@@ -1548,7 +1548,7 @@ define <32 x i16> @reg_broadcast_16i16_3
;
; X64-AVX512BW-LABEL: reg_broadcast_16i16_32i16:
; X64-AVX512BW: # BB#0:
-; X64-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512BW-NEXT: retq
;
@@ -1563,13 +1563,13 @@ define <32 x i16> @reg_broadcast_16i16_3
define <32 x i8> @reg_broadcast_16i8_32i8(<16 x i8> %a0) nounwind {
; X32-LABEL: reg_broadcast_16i8_32i8:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: reg_broadcast_16i8_32i8:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-NEXT: retq
%1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
@@ -1579,56 +1579,56 @@ define <32 x i8> @reg_broadcast_16i8_32i
define <64 x i8> @reg_broadcast_16i8_64i8(<16 x i8> %a0) nounwind {
; X32-AVX-LABEL: reg_broadcast_16i8_64i8:
; X32-AVX: # BB#0:
-; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
; X32-AVX-NEXT: retl
;
; X32-AVX512F-LABEL: reg_broadcast_16i8_64i8:
; X32-AVX512F: # BB#0:
-; X32-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
; X32-AVX512F-NEXT: retl
;
; X32-AVX512BW-LABEL: reg_broadcast_16i8_64i8:
; X32-AVX512BW: # BB#0:
-; X32-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512BW-NEXT: retl
;
; X32-AVX512DQ-LABEL: reg_broadcast_16i8_64i8:
; X32-AVX512DQ: # BB#0:
-; X32-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
; X32-AVX512DQ-NEXT: retl
;
; X64-AVX-LABEL: reg_broadcast_16i8_64i8:
; X64-AVX: # BB#0:
-; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
; X64-AVX-NEXT: retq
;
; X64-AVX512F-LABEL: reg_broadcast_16i8_64i8:
; X64-AVX512F: # BB#0:
-; X64-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
; X64-AVX512F-NEXT: retq
;
; X64-AVX512BW-LABEL: reg_broadcast_16i8_64i8:
; X64-AVX512BW: # BB#0:
-; X64-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512BW-NEXT: retq
;
; X64-AVX512DQ-LABEL: reg_broadcast_16i8_64i8:
; X64-AVX512DQ: # BB#0:
-; X64-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
; X64-AVX512DQ-NEXT: retq
@@ -1649,7 +1649,7 @@ define <64 x i8> @reg_broadcast_32i8_64i
;
; X32-AVX512BW-LABEL: reg_broadcast_32i8_64i8:
; X32-AVX512BW: # BB#0:
-; X32-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X32-AVX512BW-NEXT: retl
;
@@ -1670,7 +1670,7 @@ define <64 x i8> @reg_broadcast_32i8_64i
;
; X64-AVX512BW-LABEL: reg_broadcast_32i8_64i8:
; X64-AVX512BW: # BB#0:
-; X64-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; X64-AVX512BW-NEXT: retq
;
Modified: llvm/trunk/test/CodeGen/X86/tailcall-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcall-64.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tailcall-64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tailcall-64.ll Tue Nov 28 09:15:09 2017
@@ -181,8 +181,8 @@ define { i64, i64 } @crash(i8* %this) {
; Check that we can fold an indexed load into a tail call instruction.
; CHECK: fold_indexed_load
-; CHECK: leaq (%rsi,%rsi,4), %[[RAX:r..]]
-; CHECK: jmpq *16(%{{r..}},%[[RAX]],8) ## TAILCALL
+; CHECK: leaq (%rsi,%rsi,4), %[[rax:r..]]
+; CHECK: jmpq *16(%{{r..}},%[[rax]],8) ## TAILCALL
%struct.funcs = type { i32 (i8*, i32*, i32)*, i32 (i8*)*, i32 (i8*)*, i32 (i8*, i32)*, i32 }
@func_table = external global [0 x %struct.funcs]
define void @fold_indexed_load(i8* %mbstr, i64 %idxprom) nounwind uwtable ssp {
Modified: llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll Tue Nov 28 09:15:09 2017
@@ -28,7 +28,7 @@ define i32 @test__blcfill_u32(i32 %a0) {
;
; X64-LABEL: test__blcfill_u32:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal 1(%rdi), %eax
; X64-NEXT: andl %edi, %eax
; X64-NEXT: retq
@@ -48,7 +48,7 @@ define i32 @test__blci_u32(i32 %a0) {
;
; X64-LABEL: test__blci_u32:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal 1(%rdi), %eax
; X64-NEXT: xorl $-1, %eax
; X64-NEXT: orl %edi, %eax
@@ -93,7 +93,7 @@ define i32 @test__blcmsk_u32(i32 %a0) {
;
; X64-LABEL: test__blcmsk_u32:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal 1(%rdi), %eax
; X64-NEXT: xorl %edi, %eax
; X64-NEXT: retq
@@ -112,7 +112,7 @@ define i32 @test__blcs_u32(i32 %a0) {
;
; X64-LABEL: test__blcs_u32:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal 1(%rdi), %eax
; X64-NEXT: orl %edi, %eax
; X64-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/tbm_patterns.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm_patterns.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm_patterns.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm_patterns.ll Tue Nov 28 09:15:09 2017
@@ -151,7 +151,7 @@ define i32 @test_x86_tbm_blcfill_u32_z(i
define i32 @test_x86_tbm_blcfill_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {
; CHECK-LABEL: test_x86_tbm_blcfill_u32_z2:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal 1(%rdi), %eax
; CHECK-NEXT: testl %edi, %eax
; CHECK-NEXT: cmovnel %edx, %esi
@@ -230,7 +230,7 @@ define i32 @test_x86_tbm_blci_u32_z(i32
define i32 @test_x86_tbm_blci_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {
; CHECK-LABEL: test_x86_tbm_blci_u32_z2:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal 1(%rdi), %eax
; CHECK-NEXT: notl %eax
; CHECK-NEXT: orl %edi, %eax
@@ -419,7 +419,7 @@ define i32 @test_x86_tbm_blcmsk_u32_z(i3
define i32 @test_x86_tbm_blcmsk_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {
; CHECK-LABEL: test_x86_tbm_blcmsk_u32_z2:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal 1(%rdi), %eax
; CHECK-NEXT: xorl %edi, %eax
; CHECK-NEXT: cmovnel %edx, %esi
@@ -496,7 +496,7 @@ define i32 @test_x86_tbm_blcs_u32_z(i32
define i32 @test_x86_tbm_blcs_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {
; CHECK-LABEL: test_x86_tbm_blcs_u32_z2:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal 1(%rdi), %eax
; CHECK-NEXT: orl %edi, %eax
; CHECK-NEXT: cmovnel %edx, %esi
@@ -573,7 +573,7 @@ define i32 @test_x86_tbm_blsfill_u32_z(i
define i32 @test_x86_tbm_blsfill_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {
; CHECK-LABEL: test_x86_tbm_blsfill_u32_z2:
; CHECK: # BB#0:
-; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal -1(%rdi), %eax
; CHECK-NEXT: orl %edi, %eax
; CHECK-NEXT: cmovnel %edx, %esi
Modified: llvm/trunk/test/CodeGen/X86/umul-with-overflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/umul-with-overflow.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/umul-with-overflow.ll (original)
+++ llvm/trunk/test/CodeGen/X86/umul-with-overflow.ll Tue Nov 28 09:15:09 2017
@@ -35,7 +35,7 @@ define i32 @test2(i32 %a, i32 %b) nounwi
;
; X64-LABEL: test2:
; X64: # BB#0: # %entry
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: addl %esi, %edi
; X64-NEXT: leal (%rdi,%rdi), %eax
; X64-NEXT: retq
@@ -57,8 +57,8 @@ define i32 @test3(i32 %a, i32 %b) nounwi
;
; X64-LABEL: test3:
; X64: # BB#0: # %entry
-; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rsi), %eax
; X64-NEXT: movl $4, %ecx
; X64-NEXT: mull %ecx
Modified: llvm/trunk/test/CodeGen/X86/urem-i8-constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/urem-i8-constant.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/urem-i8-constant.ll (original)
+++ llvm/trunk/test/CodeGen/X86/urem-i8-constant.ll Tue Nov 28 09:15:09 2017
@@ -11,7 +11,7 @@ define i8 @foo(i8 %tmp325) {
; CHECK-NEXT: shrl $12, %eax
; CHECK-NEXT: movzwl %ax, %eax
; CHECK-NEXT: movb $37, %dl
-; CHECK-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; CHECK-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; CHECK-NEXT: mulb %dl
; CHECK-NEXT: subb %al, %cl
; CHECK-NEXT: movl %ecx, %eax
Modified: llvm/trunk/test/CodeGen/X86/urem-power-of-two.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/urem-power-of-two.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/urem-power-of-two.ll (original)
+++ llvm/trunk/test/CodeGen/X86/urem-power-of-two.ll Tue Nov 28 09:15:09 2017
@@ -56,7 +56,7 @@ define i16 @shift_right_pow_2(i16 %x, i1
; X86-NEXT: shrl %cl, %eax
; X86-NEXT: decl %eax
; X86-NEXT: andw {{[0-9]+}}(%esp), %ax
-; X86-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: shift_right_pow_2:
@@ -66,7 +66,7 @@ define i16 @shift_right_pow_2(i16 %x, i1
; X64-NEXT: shrl %cl, %eax
; X64-NEXT: decl %eax
; X64-NEXT: andl %edi, %eax
-; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
%shr = lshr i16 -32768, %y
%urem = urem i16 %x, %shr
@@ -81,20 +81,20 @@ define i8 @and_pow_2(i8 %x, i8 %y) {
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: andb $4, %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: # kill: %EAX<def> %EAX<kill> %AX<def>
+; X86-NEXT: # kill: %eax<def> %eax<kill> %ax<def>
; X86-NEXT: divb %cl
; X86-NEXT: movzbl %ah, %eax # NOREX
-; X86-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; X86-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: and_pow_2:
; X64: # BB#0:
; X64-NEXT: andb $4, %sil
; X64-NEXT: movzbl %dil, %eax
-; X64-NEXT: # kill: %EAX<def> %EAX<kill> %AX<def>
+; X64-NEXT: # kill: %eax<def> %eax<kill> %ax<def>
; X64-NEXT: divb %sil
; X64-NEXT: movzbl %ah, %eax # NOREX
-; X64-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; X64-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; X64-NEXT: retq
%and = and i8 %y, 4
%urem = urem i8 %x, %and
Modified: llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll Tue Nov 28 09:15:09 2017
@@ -60,9 +60,9 @@ define <2 x i64> @fptosi_2f64_to_2i64(<2
;
; AVX512DQ-LABEL: fptosi_2f64_to_2i64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvttpd2qq %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -115,7 +115,7 @@ define <4 x i32> @fptosi_4f64_to_2i32(<2
;
; AVX-LABEL: fptosi_4f64_to_2i32:
; AVX: # BB#0:
-; AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX-NEXT: vcvttpd2dq %ymm0, %xmm0
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
@@ -217,9 +217,9 @@ define <4 x i64> @fptosi_4f64_to_4i64(<4
;
; AVX512DQ-LABEL: fptosi_4f64_to_4i64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvttpd2qq %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptosi_4f64_to_4i64:
@@ -321,9 +321,9 @@ define <2 x i64> @fptoui_2f64_to_2i64(<2
;
; AVX512DQ-LABEL: fptoui_2f64_to_2i64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvttpd2uqq %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -388,7 +388,7 @@ define <4 x i32> @fptoui_2f64_to_4i32(<2
;
; AVX512F-LABEL: fptoui_2f64_to_4i32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512F-NEXT: vcvttpd2udq %zmm0, %ymm0
; AVX512F-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512F-NEXT: vzeroupper
@@ -401,7 +401,7 @@ define <4 x i32> @fptoui_2f64_to_4i32(<2
;
; AVX512DQ-LABEL: fptoui_2f64_to_4i32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvttpd2udq %zmm0, %ymm0
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512DQ-NEXT: vzeroupper
@@ -467,9 +467,9 @@ define <4 x i32> @fptoui_2f64_to_2i32(<2
;
; AVX512F-LABEL: fptoui_2f64_to_2i32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512F-NEXT: vcvttpd2udq %zmm0, %ymm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -480,9 +480,9 @@ define <4 x i32> @fptoui_2f64_to_2i32(<2
;
; AVX512DQ-LABEL: fptoui_2f64_to_2i32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvttpd2udq %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -542,30 +542,30 @@ define <4 x i32> @fptoui_4f64_to_2i32(<2
;
; AVX512F-LABEL: fptoui_4f64_to_2i32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512F-NEXT: vcvttpd2udq %zmm0, %ymm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
; AVX512VL-LABEL: fptoui_4f64_to_2i32:
; AVX512VL: # BB#0:
-; AVX512VL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512VL-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512VL-NEXT: vcvttpd2udq %ymm0, %xmm0
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq
;
; AVX512DQ-LABEL: fptoui_4f64_to_2i32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvttpd2udq %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptoui_4f64_to_2i32:
; AVX512VLDQ: # BB#0:
-; AVX512VLDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512VLDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512VLDQ-NEXT: vcvttpd2udq %ymm0, %xmm0
; AVX512VLDQ-NEXT: vzeroupper
; AVX512VLDQ-NEXT: retq
@@ -736,9 +736,9 @@ define <4 x i64> @fptoui_4f64_to_4i64(<4
;
; AVX512DQ-LABEL: fptoui_4f64_to_4i64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvttpd2uqq %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptoui_4f64_to_4i64:
@@ -812,9 +812,9 @@ define <4 x i32> @fptoui_4f64_to_4i32(<4
;
; AVX512F-LABEL: fptoui_4f64_to_4i32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: vcvttpd2udq %zmm0, %ymm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -826,9 +826,9 @@ define <4 x i32> @fptoui_4f64_to_4i32(<4
;
; AVX512DQ-LABEL: fptoui_4f64_to_4i32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvttpd2udq %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -980,16 +980,16 @@ define <2 x i64> @fptosi_4f32_to_2i64(<4
;
; AVX512DQ-LABEL: fptosi_4f32_to_2i64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512DQ-NEXT: vcvttps2qq %ymm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptosi_4f32_to_2i64:
; AVX512VLDQ: # BB#0:
; AVX512VLDQ-NEXT: vcvttps2qq %xmm0, %ymm0
-; AVX512VLDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512VLDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512VLDQ-NEXT: vzeroupper
; AVX512VLDQ-NEXT: retq
%cvt = fptosi <4 x float> %a to <4 x i64>
@@ -1108,7 +1108,7 @@ define <4 x i64> @fptosi_4f32_to_4i64(<8
; AVX512DQ-LABEL: fptosi_4f32_to_4i64:
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vcvttps2qq %ymm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptosi_4f32_to_4i64:
@@ -1216,13 +1216,13 @@ define <4 x i64> @fptosi_8f32_to_4i64(<8
; AVX512DQ-LABEL: fptosi_8f32_to_4i64:
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vcvttps2qq %ymm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptosi_8f32_to_4i64:
; AVX512VLDQ: # BB#0:
; AVX512VLDQ-NEXT: vcvttps2qq %ymm0, %zmm0
-; AVX512VLDQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512VLDQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512VLDQ-NEXT: retq
%cvt = fptosi <8 x float> %a to <8 x i64>
%shuf = shufflevector <8 x i64> %cvt, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
@@ -1283,7 +1283,7 @@ define <2 x i32> @fptoui_2f32_to_2i32(<2
;
; AVX512F-LABEL: fptoui_2f32_to_2i32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512F-NEXT: vcvttps2udq %zmm0, %zmm0
; AVX512F-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
; AVX512F-NEXT: vzeroupper
@@ -1297,7 +1297,7 @@ define <2 x i32> @fptoui_2f32_to_2i32(<2
;
; AVX512DQ-LABEL: fptoui_2f32_to_2i32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvttps2udq %zmm0, %zmm0
; AVX512DQ-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
; AVX512DQ-NEXT: vzeroupper
@@ -1351,9 +1351,9 @@ define <4 x i32> @fptoui_4f32_to_4i32(<4
;
; AVX512F-LABEL: fptoui_4f32_to_4i32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512F-NEXT: vcvttps2udq %zmm0, %zmm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -1364,9 +1364,9 @@ define <4 x i32> @fptoui_4f32_to_4i32(<4
;
; AVX512DQ-LABEL: fptoui_4f32_to_4i32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvttps2udq %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -1535,16 +1535,16 @@ define <2 x i64> @fptoui_4f32_to_2i64(<4
;
; AVX512DQ-LABEL: fptoui_4f32_to_2i64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512DQ-NEXT: vcvttps2uqq %ymm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptoui_4f32_to_2i64:
; AVX512VLDQ: # BB#0:
; AVX512VLDQ-NEXT: vcvttps2uqq %xmm0, %ymm0
-; AVX512VLDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512VLDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512VLDQ-NEXT: vzeroupper
; AVX512VLDQ-NEXT: retq
%cvt = fptoui <4 x float> %a to <4 x i64>
@@ -1648,9 +1648,9 @@ define <8 x i32> @fptoui_8f32_to_8i32(<8
;
; AVX512F-LABEL: fptoui_8f32_to_8i32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: vcvttps2udq %zmm0, %zmm0
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; AVX512VL-LABEL: fptoui_8f32_to_8i32:
@@ -1660,9 +1660,9 @@ define <8 x i32> @fptoui_8f32_to_8i32(<8
;
; AVX512DQ-LABEL: fptoui_8f32_to_8i32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvttps2udq %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptoui_8f32_to_8i32:
@@ -1839,7 +1839,7 @@ define <4 x i64> @fptoui_4f32_to_4i64(<8
; AVX512DQ-LABEL: fptoui_4f32_to_4i64:
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vcvttps2uqq %ymm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptoui_4f32_to_4i64:
@@ -2017,13 +2017,13 @@ define <4 x i64> @fptoui_8f32_to_4i64(<8
; AVX512DQ-LABEL: fptoui_8f32_to_4i64:
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vcvttps2uqq %ymm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptoui_8f32_to_4i64:
; AVX512VLDQ: # BB#0:
; AVX512VLDQ-NEXT: vcvttps2uqq %ymm0, %zmm0
-; AVX512VLDQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512VLDQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512VLDQ-NEXT: retq
%cvt = fptoui <8 x float> %a to <8 x i64>
%shuf = shufflevector <8 x i64> %cvt, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
Modified: llvm/trunk/test/CodeGen/X86/vec_ins_extract-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_ins_extract-1.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_ins_extract-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_ins_extract-1.ll Tue Nov 28 09:15:09 2017
@@ -22,7 +22,7 @@ define i32 @t0(i32 inreg %t7, <4 x i32>
;
; X64-LABEL: t0:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; X64-NEXT: andl $3, %edi
; X64-NEXT: movl $76, -24(%rsp,%rdi,4)
@@ -51,7 +51,7 @@ define i32 @t1(i32 inreg %t7, <4 x i32>
;
; X64-LABEL: t1:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: movl $76, %eax
; X64-NEXT: pinsrd $0, %eax, %xmm0
; X64-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
@@ -79,7 +79,7 @@ define <4 x i32> @t2(i32 inreg %t7, <4 x
;
; X64-LABEL: t2:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
; X64-NEXT: andl $3, %edi
; X64-NEXT: pinsrd $0, -24(%rsp,%rdi,4), %xmm0
@@ -106,7 +106,7 @@ define <4 x i32> @t3(i32 inreg %t7, <4 x
;
; X64-LABEL: t3:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; X64-NEXT: andl $3, %edi
; X64-NEXT: movss %xmm0, -24(%rsp,%rdi,4)
Modified: llvm/trunk/test/CodeGen/X86/vec_insert-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-4.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_insert-4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_insert-4.ll Tue Nov 28 09:15:09 2017
@@ -26,7 +26,7 @@ define <8 x float> @f(<8 x float> %a, i3
; X64-NEXT: movq %rsp, %rbp
; X64-NEXT: andq $-32, %rsp
; X64-NEXT: subq $64, %rsp
-; X64-NEXT: ## kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: ## kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp)
; X64-NEXT: movaps %xmm0, (%rsp)
; X64-NEXT: andl $7, %edi
Modified: llvm/trunk/test/CodeGen/X86/vec_insert-5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-5.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_insert-5.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_insert-5.ll Tue Nov 28 09:15:09 2017
@@ -17,7 +17,7 @@ define void @t1(i32 %a, x86_mmx* %P) no
;
; X64-LABEL: t1:
; X64: # BB#0:
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: shll $12, %edi
; X64-NEXT: movq %rdi, %xmm0
; X64-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
Modified: llvm/trunk/test/CodeGen/X86/vec_insert-7.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-7.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_insert-7.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_insert-7.ll Tue Nov 28 09:15:09 2017
@@ -2,7 +2,7 @@
; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=+mmx,+sse4.2 | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+mmx,+sse4.2 | FileCheck %s --check-prefix=X64
-; MMX insertelement is not available; these are promoted to XMM.
+; MMX insertelement is not available; these are promoted to xmm.
; (Without SSE they are split to two ints, and the code is much better.)
define x86_mmx @mmx_movzl(x86_mmx %x) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/vec_insert-8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-8.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_insert-8.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_insert-8.ll Tue Nov 28 09:15:09 2017
@@ -23,7 +23,7 @@ define <4 x i32> @var_insert(<4 x i32> %
;
; X64-LABEL: var_insert:
; X64: # BB#0: # %entry
-; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
+; X64-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; X64-NEXT: andl $3, %esi
; X64-NEXT: movl %edi, -24(%rsp,%rsi,4)
@@ -51,7 +51,7 @@ define i32 @var_extract(<4 x i32> %x, i3
;
; X64-LABEL: var_extract:
; X64: # BB#0: # %entry
-; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; X64-NEXT: andl $3, %edi
; X64-NEXT: movl -24(%rsp,%rdi,4), %eax
Modified: llvm/trunk/test/CodeGen/X86/vec_insert-mmx.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-mmx.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_insert-mmx.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_insert-mmx.ll Tue Nov 28 09:15:09 2017
@@ -2,7 +2,7 @@
; RUN: llc < %s -mtriple=i686-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse4.1 | FileCheck %s --check-prefix=X64
-; This is not an MMX operation; promoted to XMM.
+; This is not an MMX operation; promoted to xmm.
define x86_mmx @t0(i32 %A) nounwind {
; X32-LABEL: t0:
; X32: ## BB#0:
@@ -16,7 +16,7 @@ define x86_mmx @t0(i32 %A) nounwind {
;
; X64-LABEL: t0:
; X64: ## BB#0:
-; X64-NEXT: ## kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT: ## kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: movq %rdi, %xmm0
; X64-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
Modified: llvm/trunk/test/CodeGen/X86/vec_int_to_fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_int_to_fp.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_int_to_fp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_int_to_fp.ll Tue Nov 28 09:15:09 2017
@@ -58,9 +58,9 @@ define <2 x double> @sitofp_2i64_to_2f64
;
; AVX512DQ-LABEL: sitofp_2i64_to_2f64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -96,7 +96,7 @@ define <2 x double> @sitofp_4i32_to_2f64
; AVX-LABEL: sitofp_4i32_to_2f64:
; AVX: # BB#0:
; AVX-NEXT: vcvtdq2pd %xmm0, %ymm0
-; AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
%cvt = sitofp <4 x i32> %a to <4 x double>
@@ -134,7 +134,7 @@ define <2 x double> @sitofp_8i16_to_2f64
; AVX1: # BB#0:
; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0
; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -142,7 +142,7 @@ define <2 x double> @sitofp_8i16_to_2f64
; AVX2: # BB#0:
; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -150,7 +150,7 @@ define <2 x double> @sitofp_8i16_to_2f64
; AVX512: # BB#0:
; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0
; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%cvt = sitofp <8 x i16> %a to <8 x double>
@@ -190,7 +190,7 @@ define <2 x double> @sitofp_16i8_to_2f64
; AVX1: # BB#0:
; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0
; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -198,7 +198,7 @@ define <2 x double> @sitofp_16i8_to_2f64
; AVX2: # BB#0:
; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0
; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -206,7 +206,7 @@ define <2 x double> @sitofp_16i8_to_2f64
; AVX512: # BB#0:
; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%cvt = sitofp <16 x i8> %a to <16 x double>
@@ -301,9 +301,9 @@ define <4 x double> @sitofp_4i64_to_4f64
;
; AVX512DQ-LABEL: sitofp_4i64_to_4f64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: sitofp_4i64_to_4f64:
@@ -377,7 +377,7 @@ define <4 x double> @sitofp_8i16_to_4f64
; AVX512: # BB#0:
; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0
; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512-NEXT: retq
%cvt = sitofp <8 x i16> %a to <8 x double>
%shuf = shufflevector <8 x double> %cvt, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
@@ -432,7 +432,7 @@ define <4 x double> @sitofp_16i8_to_4f64
; AVX512: # BB#0:
; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512-NEXT: retq
%cvt = sitofp <16 x i8> %a to <16 x double>
%shuf = shufflevector <16 x double> %cvt, <16 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
@@ -492,9 +492,9 @@ define <2 x double> @uitofp_2i64_to_2f64
;
; AVX512DQ-LABEL: uitofp_2i64_to_2f64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -531,9 +531,9 @@ define <2 x double> @uitofp_2i32_to_2f64
;
; AVX512F-LABEL: uitofp_2i32_to_2f64:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -544,9 +544,9 @@ define <2 x double> @uitofp_2i32_to_2f64
;
; AVX512DQ-LABEL: uitofp_2i32_to_2f64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -580,7 +580,7 @@ define <2 x double> @uitofp_4i32_to_2f64
; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0
; AVX1-NEXT: vmulpd {{.*}}(%rip), %ymm0, %ymm0
; AVX1-NEXT: vaddpd %ymm1, %ymm0, %ymm0
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -594,37 +594,37 @@ define <2 x double> @uitofp_4i32_to_2f64
; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7]
; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0
; AVX2-NEXT: vaddpd %ymm0, %ymm1, %ymm0
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512F-LABEL: uitofp_4i32_to_2f64:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
; AVX512VL-LABEL: uitofp_4i32_to_2f64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vcvtudq2pd %xmm0, %ymm0
-; AVX512VL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512VL-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq
;
; AVX512DQ-LABEL: uitofp_4i32_to_2f64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: uitofp_4i32_to_2f64:
; AVX512VLDQ: # BB#0:
; AVX512VLDQ-NEXT: vcvtudq2pd %xmm0, %ymm0
-; AVX512VLDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512VLDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512VLDQ-NEXT: vzeroupper
; AVX512VLDQ-NEXT: retq
%cvt = uitofp <4 x i32> %a to <4 x double>
@@ -662,7 +662,7 @@ define <2 x double> @uitofp_8i16_to_2f64
; AVX1: # BB#0:
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -670,7 +670,7 @@ define <2 x double> @uitofp_8i16_to_2f64
; AVX2: # BB#0:
; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -678,7 +678,7 @@ define <2 x double> @uitofp_8i16_to_2f64
; AVX512: # BB#0:
; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%cvt = uitofp <8 x i16> %a to <8 x double>
@@ -718,7 +718,7 @@ define <2 x double> @uitofp_16i8_to_2f64
; AVX1: # BB#0:
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -726,7 +726,7 @@ define <2 x double> @uitofp_16i8_to_2f64
; AVX2: # BB#0:
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -734,7 +734,7 @@ define <2 x double> @uitofp_16i8_to_2f64
; AVX512: # BB#0:
; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%cvt = uitofp <16 x i8> %a to <16 x double>
@@ -823,9 +823,9 @@ define <4 x double> @uitofp_4i64_to_4f64
;
; AVX512DQ-LABEL: uitofp_4i64_to_4f64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: uitofp_4i64_to_4f64:
@@ -883,9 +883,9 @@ define <4 x double> @uitofp_4i32_to_4f64
;
; AVX512F-LABEL: uitofp_4i32_to_4f64:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; AVX512VL-LABEL: uitofp_4i32_to_4f64:
@@ -895,9 +895,9 @@ define <4 x double> @uitofp_4i32_to_4f64
;
; AVX512DQ-LABEL: uitofp_4i32_to_4f64:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: uitofp_4i32_to_4f64:
@@ -956,7 +956,7 @@ define <4 x double> @uitofp_8i16_to_4f64
; AVX512: # BB#0:
; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512-NEXT: retq
%cvt = uitofp <8 x i16> %a to <8 x double>
%shuf = shufflevector <8 x double> %cvt, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
@@ -1013,7 +1013,7 @@ define <4 x double> @uitofp_16i8_to_4f64
; AVX512: # BB#0:
; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512-NEXT: retq
%cvt = uitofp <16 x i8> %a to <16 x double>
%shuf = shufflevector <16 x double> %cvt, <16 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
@@ -1072,9 +1072,9 @@ define <4 x float> @sitofp_2i64_to_4f32(
;
; AVX512DQ-LABEL: sitofp_2i64_to_4f32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -1131,7 +1131,7 @@ define <4 x float> @sitofp_2i64_to_4f32_
;
; AVX512DQ-LABEL: sitofp_2i64_to_4f32_zero:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512DQ-NEXT: vzeroupper
@@ -1197,15 +1197,15 @@ define <4 x float> @sitofp_4i64_to_4f32_
;
; AVX512DQ-LABEL: sitofp_4i64_to_4f32_undef:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: sitofp_4i64_to_4f32_undef:
; AVX512VLDQ: # BB#0:
-; AVX512VLDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512VLDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512VLDQ-NEXT: vcvtqq2ps %ymm0, %xmm0
; AVX512VLDQ-NEXT: vzeroupper
; AVX512VLDQ-NEXT: retq
@@ -1261,7 +1261,7 @@ define <4 x float> @sitofp_8i16_to_4f32(
; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -1269,7 +1269,7 @@ define <4 x float> @sitofp_8i16_to_4f32(
; AVX2: # BB#0:
; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -1277,7 +1277,7 @@ define <4 x float> @sitofp_8i16_to_4f32(
; AVX512: # BB#0:
; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0
; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%cvt = sitofp <8 x i16> %a to <8 x float>
@@ -1320,7 +1320,7 @@ define <4 x float> @sitofp_16i8_to_4f32(
; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -1328,7 +1328,7 @@ define <4 x float> @sitofp_16i8_to_4f32(
; AVX2: # BB#0:
; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0
; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -1336,7 +1336,7 @@ define <4 x float> @sitofp_16i8_to_4f32(
; AVX512: # BB#0:
; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512-NEXT: vcvtdq2ps %zmm0, %zmm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%cvt = sitofp <16 x i8> %a to <16 x float>
@@ -1436,9 +1436,9 @@ define <4 x float> @sitofp_4i64_to_4f32(
;
; AVX512DQ-LABEL: sitofp_4i64_to_4f32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -1576,7 +1576,7 @@ define <8 x float> @sitofp_16i8_to_8f32(
; AVX512: # BB#0:
; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512-NEXT: vcvtdq2ps %zmm0, %zmm0
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512-NEXT: retq
%cvt = sitofp <16 x i8> %a to <16 x float>
%shuf = shufflevector <16 x float> %cvt, <16 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
@@ -1691,9 +1691,9 @@ define <4 x float> @uitofp_2i64_to_4f32(
;
; AVX512DQ-LABEL: uitofp_2i64_to_4f32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -1800,7 +1800,7 @@ define <4 x float> @uitofp_2i64_to_2f32(
;
; AVX512DQ-LABEL: uitofp_2i64_to_2f32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512DQ-NEXT: vzeroupper
@@ -1927,15 +1927,15 @@ define <4 x float> @uitofp_4i64_to_4f32_
;
; AVX512DQ-LABEL: uitofp_4i64_to_4f32_undef:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: uitofp_4i64_to_4f32_undef:
; AVX512VLDQ: # BB#0:
-; AVX512VLDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512VLDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512VLDQ-NEXT: vcvtuqq2ps %ymm0, %xmm0
; AVX512VLDQ-NEXT: vzeroupper
; AVX512VLDQ-NEXT: retq
@@ -1979,9 +1979,9 @@ define <4 x float> @uitofp_4i32_to_4f32(
;
; AVX512F-LABEL: uitofp_4i32_to_4f32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -1992,9 +1992,9 @@ define <4 x float> @uitofp_4i32_to_4f32(
;
; AVX512DQ-LABEL: uitofp_4i32_to_4f32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtudq2ps %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -2039,7 +2039,7 @@ define <4 x float> @uitofp_8i16_to_4f32(
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -2047,7 +2047,7 @@ define <4 x float> @uitofp_8i16_to_4f32(
; AVX2: # BB#0:
; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -2055,7 +2055,7 @@ define <4 x float> @uitofp_8i16_to_4f32(
; AVX512: # BB#0:
; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%cvt = uitofp <8 x i16> %a to <8 x float>
@@ -2098,7 +2098,7 @@ define <4 x float> @uitofp_16i8_to_4f32(
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -2106,7 +2106,7 @@ define <4 x float> @uitofp_16i8_to_4f32(
; AVX2: # BB#0:
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -2114,7 +2114,7 @@ define <4 x float> @uitofp_16i8_to_4f32(
; AVX512: # BB#0:
; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512-NEXT: vcvtdq2ps %zmm0, %zmm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%cvt = uitofp <16 x i8> %a to <16 x float>
@@ -2361,9 +2361,9 @@ define <4 x float> @uitofp_4i64_to_4f32(
;
; AVX512DQ-LABEL: uitofp_4i64_to_4f32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -2425,9 +2425,9 @@ define <8 x float> @uitofp_8i32_to_8f32(
;
; AVX512F-LABEL: uitofp_8i32_to_8f32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; AVX512VL-LABEL: uitofp_8i32_to_8f32:
@@ -2437,9 +2437,9 @@ define <8 x float> @uitofp_8i32_to_8f32(
;
; AVX512DQ-LABEL: uitofp_8i32_to_8f32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vcvtudq2ps %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: uitofp_8i32_to_8f32:
@@ -2556,7 +2556,7 @@ define <8 x float> @uitofp_16i8_to_8f32(
; AVX512: # BB#0:
; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512-NEXT: vcvtdq2ps %zmm0, %zmm0
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512-NEXT: retq
%cvt = uitofp <16 x i8> %a to <16 x float>
%shuf = shufflevector <16 x float> %cvt, <16 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
@@ -2614,7 +2614,7 @@ define <2 x double> @sitofp_load_2i64_to
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vmovaps (%rdi), %xmm0
; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -2778,7 +2778,7 @@ define <4 x double> @sitofp_load_4i64_to
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vmovaps (%rdi), %ymm0
; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: sitofp_load_4i64_to_4f64:
@@ -2910,7 +2910,7 @@ define <2 x double> @uitofp_load_2i64_to
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vmovaps (%rdi), %xmm0
; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -2952,7 +2952,7 @@ define <2 x double> @uitofp_load_2i32_to
; AVX512F: # BB#0:
; AVX512F-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -2965,7 +2965,7 @@ define <2 x double> @uitofp_load_2i32_to
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -3108,7 +3108,7 @@ define <4 x double> @uitofp_load_4i64_to
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vmovaps (%rdi), %ymm0
; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: uitofp_load_4i64_to_4f64:
@@ -3172,7 +3172,7 @@ define <4 x double> @uitofp_load_4i32_to
; AVX512F: # BB#0:
; AVX512F-NEXT: vmovaps (%rdi), %xmm0
; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; AVX512VL-LABEL: uitofp_load_4i32_to_4f64:
@@ -3184,7 +3184,7 @@ define <4 x double> @uitofp_load_4i32_to
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vmovaps (%rdi), %xmm0
; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: uitofp_load_4i32_to_4f64:
@@ -3342,7 +3342,7 @@ define <4 x float> @sitofp_load_4i64_to_
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vmovaps (%rdi), %ymm0
; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -3933,7 +3933,7 @@ define <4 x float> @uitofp_load_4i64_to_
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vmovaps (%rdi), %ymm0
; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -3986,7 +3986,7 @@ define <4 x float> @uitofp_load_4i32_to_
; AVX512F: # BB#0:
; AVX512F-NEXT: vmovaps (%rdi), %xmm0
; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -3999,7 +3999,7 @@ define <4 x float> @uitofp_load_4i32_to_
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vmovaps (%rdi), %xmm0
; AVX512DQ-NEXT: vcvtudq2ps %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -4575,7 +4575,7 @@ define <8 x float> @uitofp_load_8i32_to_
; AVX512F: # BB#0:
; AVX512F-NEXT: vmovaps (%rdi), %ymm0
; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; AVX512VL-LABEL: uitofp_load_8i32_to_8f32:
@@ -4587,7 +4587,7 @@ define <8 x float> @uitofp_load_8i32_to_
; AVX512DQ: # BB#0:
; AVX512DQ-NEXT: vmovaps (%rdi), %ymm0
; AVX512DQ-NEXT: vcvtudq2ps %zmm0, %zmm0
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: uitofp_load_8i32_to_8f32:
Modified: llvm/trunk/test/CodeGen/X86/vec_ss_load_fold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_ss_load_fold.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_ss_load_fold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_ss_load_fold.ll Tue Nov 28 09:15:09 2017
@@ -17,7 +17,7 @@ define i16 @test1(float %f) nounwind {
; X32-NEXT: minss LCPI0_2, %xmm0
; X32-NEXT: maxss %xmm1, %xmm0
; X32-NEXT: cvttss2si %xmm0, %eax
-; X32-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; X32-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; X32-NEXT: retl
;
; X64-LABEL: test1:
@@ -29,7 +29,7 @@ define i16 @test1(float %f) nounwind {
; X64-NEXT: minss {{.*}}(%rip), %xmm0
; X64-NEXT: maxss %xmm1, %xmm0
; X64-NEXT: cvttss2si %xmm0, %eax
-; X64-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
;
; X32_AVX1-LABEL: test1:
@@ -42,7 +42,7 @@ define i16 @test1(float %f) nounwind {
; X32_AVX1-NEXT: vminss LCPI0_2, %xmm0, %xmm0
; X32_AVX1-NEXT: vmaxss %xmm1, %xmm0, %xmm0
; X32_AVX1-NEXT: vcvttss2si %xmm0, %eax
-; X32_AVX1-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; X32_AVX1-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; X32_AVX1-NEXT: retl
;
; X64_AVX1-LABEL: test1:
@@ -54,7 +54,7 @@ define i16 @test1(float %f) nounwind {
; X64_AVX1-NEXT: vminss {{.*}}(%rip), %xmm0, %xmm0
; X64_AVX1-NEXT: vmaxss %xmm1, %xmm0, %xmm0
; X64_AVX1-NEXT: vcvttss2si %xmm0, %eax
-; X64_AVX1-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; X64_AVX1-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; X64_AVX1-NEXT: retq
;
; X32_AVX512-LABEL: test1:
@@ -67,7 +67,7 @@ define i16 @test1(float %f) nounwind {
; X32_AVX512-NEXT: vminss LCPI0_2, %xmm0, %xmm0
; X32_AVX512-NEXT: vmaxss %xmm1, %xmm0, %xmm0
; X32_AVX512-NEXT: vcvttss2si %xmm0, %eax
-; X32_AVX512-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; X32_AVX512-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; X32_AVX512-NEXT: retl
;
; X64_AVX512-LABEL: test1:
@@ -79,7 +79,7 @@ define i16 @test1(float %f) nounwind {
; X64_AVX512-NEXT: vminss {{.*}}(%rip), %xmm0, %xmm0
; X64_AVX512-NEXT: vmaxss %xmm1, %xmm0, %xmm0
; X64_AVX512-NEXT: vcvttss2si %xmm0, %eax
-; X64_AVX512-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; X64_AVX512-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; X64_AVX512-NEXT: retq
%tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1]
%tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
@@ -104,7 +104,7 @@ define i16 @test2(float %f) nounwind {
; X32-NEXT: xorps %xmm1, %xmm1
; X32-NEXT: maxss %xmm1, %xmm0
; X32-NEXT: cvttss2si %xmm0, %eax
-; X32-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; X32-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; X32-NEXT: retl
;
; X64-LABEL: test2:
@@ -115,7 +115,7 @@ define i16 @test2(float %f) nounwind {
; X64-NEXT: xorps %xmm1, %xmm1
; X64-NEXT: maxss %xmm1, %xmm0
; X64-NEXT: cvttss2si %xmm0, %eax
-; X64-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; X64-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
;
; X32_AVX-LABEL: test2:
@@ -127,7 +127,7 @@ define i16 @test2(float %f) nounwind {
; X32_AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X32_AVX-NEXT: vmaxss %xmm1, %xmm0, %xmm0
; X32_AVX-NEXT: vcvttss2si %xmm0, %eax
-; X32_AVX-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; X32_AVX-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; X32_AVX-NEXT: retl
;
; X64_AVX-LABEL: test2:
@@ -138,7 +138,7 @@ define i16 @test2(float %f) nounwind {
; X64_AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X64_AVX-NEXT: vmaxss %xmm1, %xmm0, %xmm0
; X64_AVX-NEXT: vcvttss2si %xmm0, %eax
-; X64_AVX-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; X64_AVX-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; X64_AVX-NEXT: retq
%tmp28 = fsub float %f, 1.000000e+00 ; <float> [#uses=1]
%tmp37 = fmul float %tmp28, 5.000000e-01 ; <float> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/vector-bitreverse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-bitreverse.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-bitreverse.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-bitreverse.ll Tue Nov 28 09:15:09 2017
@@ -50,7 +50,7 @@ define i8 @test_bitreverse_i8(i8 %a) nou
; XOP-NEXT: vmovd %edi, %xmm0
; XOP-NEXT: vpperm {{.*}}(%rip), %xmm0, %xmm0, %xmm0
; XOP-NEXT: vpextrb $0, %xmm0, %eax
-; XOP-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; XOP-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; XOP-NEXT: retq
%b = call i8 @llvm.bitreverse.i8(i8 %a)
ret i8 %b
@@ -59,7 +59,7 @@ define i8 @test_bitreverse_i8(i8 %a) nou
define i16 @test_bitreverse_i16(i16 %a) nounwind {
; SSE-LABEL: test_bitreverse_i16:
; SSE: # BB#0:
-; SSE-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE-NEXT: rolw $8, %di
; SSE-NEXT: movl %edi, %eax
; SSE-NEXT: andl $3855, %eax # imm = 0xF0F
@@ -77,12 +77,12 @@ define i16 @test_bitreverse_i16(i16 %a)
; SSE-NEXT: andl $43690, %eax # imm = 0xAAAA
; SSE-NEXT: shrl %eax
; SSE-NEXT: leal (%rax,%rcx,2), %eax
-; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SSE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SSE-NEXT: retq
;
; AVX-LABEL: test_bitreverse_i16:
; AVX: # BB#0:
-; AVX-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX-NEXT: rolw $8, %di
; AVX-NEXT: movl %edi, %eax
; AVX-NEXT: andl $3855, %eax # imm = 0xF0F
@@ -100,7 +100,7 @@ define i16 @test_bitreverse_i16(i16 %a)
; AVX-NEXT: andl $43690, %eax # imm = 0xAAAA
; AVX-NEXT: shrl %eax
; AVX-NEXT: leal (%rax,%rcx,2), %eax
-; AVX-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX-NEXT: retq
;
; XOP-LABEL: test_bitreverse_i16:
@@ -108,7 +108,7 @@ define i16 @test_bitreverse_i16(i16 %a)
; XOP-NEXT: vmovd %edi, %xmm0
; XOP-NEXT: vpperm {{.*}}(%rip), %xmm0, %xmm0, %xmm0
; XOP-NEXT: vmovd %xmm0, %eax
-; XOP-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; XOP-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; XOP-NEXT: retq
%b = call i16 @llvm.bitreverse.i16(i16 %a)
ret i16 %b
@@ -117,7 +117,7 @@ define i16 @test_bitreverse_i16(i16 %a)
define i32 @test_bitreverse_i32(i32 %a) nounwind {
; SSE-LABEL: test_bitreverse_i32:
; SSE: # BB#0:
-; SSE-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE-NEXT: bswapl %edi
; SSE-NEXT: movl %edi, %eax
; SSE-NEXT: andl $252645135, %eax # imm = 0xF0F0F0F
@@ -139,7 +139,7 @@ define i32 @test_bitreverse_i32(i32 %a)
;
; AVX-LABEL: test_bitreverse_i32:
; AVX: # BB#0:
-; AVX-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX-NEXT: bswapl %edi
; AVX-NEXT: movl %edi, %eax
; AVX-NEXT: andl $252645135, %eax # imm = 0xF0F0F0F
Modified: llvm/trunk/test/CodeGen/X86/vector-compare-all_of.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-compare-all_of.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-compare-all_of.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-compare-all_of.ll Tue Nov 28 09:15:09 2017
@@ -624,7 +624,7 @@ define i16 @test_v8i16_sext(<8 x i16> %a
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax
; SSE-NEXT: cmovnel %ecx, %eax
-; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SSE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SSE-NEXT: retq
;
; AVX-LABEL: test_v8i16_sext:
@@ -635,7 +635,7 @@ define i16 @test_v8i16_sext(<8 x i16> %a
; AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; AVX-NEXT: movl $-1, %eax
; AVX-NEXT: cmovnel %ecx, %eax
-; AVX-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX-NEXT: retq
;
; AVX512-LABEL: test_v8i16_sext:
@@ -649,7 +649,7 @@ define i16 @test_v8i16_sext(<8 x i16> %a
; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vmovd %xmm0, %eax
-; AVX512-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX512-NEXT: retq
%c = icmp sgt <8 x i16> %a0, %a1
%s = sext <8 x i1> %c to <8 x i16>
@@ -674,7 +674,7 @@ define i16 @test_v16i16_sext(<16 x i16>
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax
; SSE-NEXT: cmovnel %ecx, %eax
-; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SSE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SSE-NEXT: retq
;
; AVX1-LABEL: test_v16i16_sext:
@@ -692,7 +692,7 @@ define i16 @test_v16i16_sext(<16 x i16>
; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vmovd %xmm0, %eax
-; AVX1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX1-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -703,7 +703,7 @@ define i16 @test_v16i16_sext(<16 x i16>
; AVX2-NEXT: xorl %eax, %eax
; AVX2-NEXT: cmpl $-1, %ecx
; AVX2-NEXT: cmovel %ecx, %eax
-; AVX2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX2-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -720,7 +720,7 @@ define i16 @test_v16i16_sext(<16 x i16>
; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vmovd %xmm0, %eax
-; AVX512-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%c = icmp sgt <16 x i16> %a0, %a1
@@ -748,7 +748,7 @@ define i16 @test_v16i16_legal_sext(<16 x
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax
; SSE-NEXT: cmovnel %ecx, %eax
-; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SSE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SSE-NEXT: retq
;
; AVX1-LABEL: test_v16i16_legal_sext:
@@ -763,7 +763,7 @@ define i16 @test_v16i16_legal_sext(<16 x
; AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; AVX1-NEXT: movl $-1, %eax
; AVX1-NEXT: cmovnel %ecx, %eax
-; AVX1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX1-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -777,7 +777,7 @@ define i16 @test_v16i16_legal_sext(<16 x
; AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; AVX2-NEXT: movl $-1, %eax
; AVX2-NEXT: cmovnel %ecx, %eax
-; AVX2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX2-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -795,7 +795,7 @@ define i16 @test_v16i16_legal_sext(<16 x
; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpextrb $0, %xmm0, %eax
; AVX512-NEXT: movsbl %al, %eax
-; AVX512-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%c = icmp sgt <16 x i16> %a0, %a1
@@ -822,7 +822,7 @@ define i8 @test_v16i8_sext(<16 x i8> %a0
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax
; SSE-NEXT: cmovnel %ecx, %eax
-; SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; SSE-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; SSE-NEXT: retq
;
; AVX-LABEL: test_v16i8_sext:
@@ -833,7 +833,7 @@ define i8 @test_v16i8_sext(<16 x i8> %a0
; AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; AVX-NEXT: movl $-1, %eax
; AVX-NEXT: cmovnel %ecx, %eax
-; AVX-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX-NEXT: retq
;
; AVX512-LABEL: test_v16i8_sext:
@@ -849,7 +849,7 @@ define i8 @test_v16i8_sext(<16 x i8> %a0
; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpextrb $0, %xmm0, %eax
-; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512-NEXT: retq
%c = icmp sgt <16 x i8> %a0, %a1
%s = sext <16 x i1> %c to <16 x i8>
@@ -876,7 +876,7 @@ define i8 @test_v32i8_sext(<32 x i8> %a0
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax
; SSE-NEXT: cmovnel %ecx, %eax
-; SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; SSE-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; SSE-NEXT: retq
;
; AVX1-LABEL: test_v32i8_sext:
@@ -896,7 +896,7 @@ define i8 @test_v32i8_sext(<32 x i8> %a0
; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vpextrb $0, %xmm0, %eax
-; AVX1-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX1-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -907,7 +907,7 @@ define i8 @test_v32i8_sext(<32 x i8> %a0
; AVX2-NEXT: xorl %eax, %eax
; AVX2-NEXT: cmpl $-1, %ecx
; AVX2-NEXT: cmovel %ecx, %eax
-; AVX2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX2-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -926,7 +926,7 @@ define i8 @test_v32i8_sext(<32 x i8> %a0
; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpextrb $0, %xmm0, %eax
-; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%c = icmp sgt <32 x i8> %a0, %a1
Modified: llvm/trunk/test/CodeGen/X86/vector-compare-any_of.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-compare-any_of.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-compare-any_of.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-compare-any_of.ll Tue Nov 28 09:15:09 2017
@@ -578,7 +578,7 @@ define i16 @test_v8i16_sext(<8 x i16> %a
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: negl %eax
; SSE-NEXT: sbbl %eax, %eax
-; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SSE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SSE-NEXT: retq
;
; AVX-LABEL: test_v8i16_sext:
@@ -587,7 +587,7 @@ define i16 @test_v8i16_sext(<8 x i16> %a
; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: negl %eax
; AVX-NEXT: sbbl %eax, %eax
-; AVX-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX-NEXT: retq
;
; AVX512-LABEL: test_v8i16_sext:
@@ -601,7 +601,7 @@ define i16 @test_v8i16_sext(<8 x i16> %a
; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vmovd %xmm0, %eax
-; AVX512-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX512-NEXT: retq
%c = icmp sgt <8 x i16> %a0, %a1
%s = sext <8 x i1> %c to <8 x i16>
@@ -624,7 +624,7 @@ define i16 @test_v16i16_sext(<16 x i16>
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: negl %eax
; SSE-NEXT: sbbl %eax, %eax
-; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SSE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SSE-NEXT: retq
;
; AVX1-LABEL: test_v16i16_sext:
@@ -642,7 +642,7 @@ define i16 @test_v16i16_sext(<16 x i16>
; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vmovd %xmm0, %eax
-; AVX1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX1-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -652,7 +652,7 @@ define i16 @test_v16i16_sext(<16 x i16>
; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: negl %eax
; AVX2-NEXT: sbbl %eax, %eax
-; AVX2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX2-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -669,7 +669,7 @@ define i16 @test_v16i16_sext(<16 x i16>
; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vmovd %xmm0, %eax
-; AVX512-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%c = icmp sgt <16 x i16> %a0, %a1
@@ -695,7 +695,7 @@ define i16 @test_v16i16_legal_sext(<16 x
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: negl %eax
; SSE-NEXT: sbbl %eax, %eax
-; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; SSE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SSE-NEXT: retq
;
; AVX1-LABEL: test_v16i16_legal_sext:
@@ -708,7 +708,7 @@ define i16 @test_v16i16_legal_sext(<16 x
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: negl %eax
; AVX1-NEXT: sbbl %eax, %eax
-; AVX1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX1-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -720,7 +720,7 @@ define i16 @test_v16i16_legal_sext(<16 x
; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: negl %eax
; AVX2-NEXT: sbbl %eax, %eax
-; AVX2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX2-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -738,7 +738,7 @@ define i16 @test_v16i16_legal_sext(<16 x
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpextrb $0, %xmm0, %eax
; AVX512-NEXT: movsbl %al, %eax
-; AVX512-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%c = icmp sgt <16 x i16> %a0, %a1
@@ -763,7 +763,7 @@ define i8 @test_v16i8_sext(<16 x i8> %a0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: negl %eax
; SSE-NEXT: sbbl %eax, %eax
-; SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; SSE-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; SSE-NEXT: retq
;
; AVX-LABEL: test_v16i8_sext:
@@ -772,7 +772,7 @@ define i8 @test_v16i8_sext(<16 x i8> %a0
; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: negl %eax
; AVX-NEXT: sbbl %eax, %eax
-; AVX-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX-NEXT: retq
;
; AVX512-LABEL: test_v16i8_sext:
@@ -788,7 +788,7 @@ define i8 @test_v16i8_sext(<16 x i8> %a0
; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpextrb $0, %xmm0, %eax
-; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512-NEXT: retq
%c = icmp sgt <16 x i8> %a0, %a1
%s = sext <16 x i1> %c to <16 x i8>
@@ -813,7 +813,7 @@ define i8 @test_v32i8_sext(<32 x i8> %a0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: negl %eax
; SSE-NEXT: sbbl %eax, %eax
-; SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; SSE-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; SSE-NEXT: retq
;
; AVX1-LABEL: test_v32i8_sext:
@@ -833,7 +833,7 @@ define i8 @test_v32i8_sext(<32 x i8> %a0
; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vpextrb $0, %xmm0, %eax
-; AVX1-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX1-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -843,7 +843,7 @@ define i8 @test_v32i8_sext(<32 x i8> %a0
; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: negl %eax
; AVX2-NEXT: sbbl %eax, %eax
-; AVX2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX2-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -862,7 +862,7 @@ define i8 @test_v32i8_sext(<32 x i8> %a0
; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpextrb $0, %xmm0, %eax
-; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%c = icmp sgt <32 x i8> %a0, %a1
Modified: llvm/trunk/test/CodeGen/X86/vector-compare-results.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-compare-results.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-compare-results.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-compare-results.ll Tue Nov 28 09:15:09 2017
@@ -145,7 +145,7 @@ define <4 x i1> @test_cmp_v4f64(<4 x dou
; AVX512: # BB#0:
; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = fcmp ogt <4 x double> %a0, %a1
@@ -181,7 +181,7 @@ define <8 x i1> @test_cmp_v8f32(<8 x flo
; AVX512: # BB#0:
; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = fcmp ogt <8 x float> %a0, %a1
@@ -244,7 +244,7 @@ define <4 x i1> @test_cmp_v4i64(<4 x i64
; AVX512: # BB#0:
; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = icmp sgt <4 x i64> %a0, %a1
@@ -281,7 +281,7 @@ define <8 x i1> @test_cmp_v8i32(<8 x i32
; AVX512: # BB#0:
; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = icmp sgt <8 x i32> %a0, %a1
@@ -334,7 +334,7 @@ define <16 x i1> @test_cmp_v16i16(<16 x
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
%1 = icmp sgt <16 x i16> %a0, %a1
@@ -632,7 +632,7 @@ define <8 x i1> @test_cmp_v8f64(<8 x dou
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vcmpltpd %zmm0, %zmm1, %k0
; AVX512BW-NEXT: vpmovm2w %k0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
%1 = fcmp ogt <8 x double> %a0, %a1
@@ -695,7 +695,7 @@ define <16 x i1> @test_cmp_v16f32(<16 x
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vcmpltps %zmm0, %zmm1, %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
%1 = fcmp ogt <16 x float> %a0, %a1
@@ -809,7 +809,7 @@ define <8 x i1> @test_cmp_v8i64(<8 x i64
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpcmpgtq %zmm1, %zmm0, %k0
; AVX512BW-NEXT: vpmovm2w %k0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
%1 = icmp sgt <8 x i64> %a0, %a1
@@ -875,7 +875,7 @@ define <16 x i1> @test_cmp_v16i32(<16 x
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpcmpgtd %zmm1, %zmm0, %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
%1 = icmp sgt <16 x i32> %a0, %a1
@@ -1146,7 +1146,7 @@ define <32 x i1> @test_cmp_v32i16(<32 x
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpcmpgtw %zmm1, %zmm0, %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
%1 = icmp sgt <32 x i16> %a0, %a1
ret <32 x i1> %1
@@ -1973,7 +1973,7 @@ define <64 x i1> @test_cmp_v64i8(<64 x i
; AVX512F-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0
; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX512F-NEXT: vextracti128 $1, %ymm4, %xmm3
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vmovdqa %xmm4, %xmm2
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
@@ -1984,7 +1984,7 @@ define <64 x i1> @test_cmp_v64i8(<64 x i
; AVX512DQ-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0
; AVX512DQ-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX512DQ-NEXT: vextracti128 $1, %ymm4, %xmm3
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vmovdqa %xmm4, %xmm2
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
@@ -2094,7 +2094,7 @@ define <16 x i1> @test_cmp_v16f64(<16 x
; AVX512BW-NEXT: vcmpltpd %zmm1, %zmm3, %k1
; AVX512BW-NEXT: kunpckbw %k0, %k1, %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
%1 = fcmp ogt <16 x double> %a0, %a1
@@ -2657,7 +2657,7 @@ define <32 x i1> @test_cmp_v32f32(<32 x
; AVX512BW-NEXT: vcmpltps %zmm1, %zmm3, %k1
; AVX512BW-NEXT: kunpckwd %k0, %k1, %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
%1 = fcmp ogt <32 x float> %a0, %a1
ret <32 x i1> %1
@@ -2853,7 +2853,7 @@ define <16 x i1> @test_cmp_v16i64(<16 x
; AVX512BW-NEXT: vpcmpgtq %zmm3, %zmm1, %k1
; AVX512BW-NEXT: kunpckbw %k0, %k1, %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
%1 = icmp sgt <16 x i64> %a0, %a1
@@ -3408,7 +3408,7 @@ define <32 x i1> @test_cmp_v32i32(<32 x
; AVX512BW-NEXT: vpcmpgtd %zmm3, %zmm1, %k1
; AVX512BW-NEXT: kunpckwd %k0, %k1, %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
%1 = icmp sgt <32 x i32> %a0, %a1
ret <32 x i1> %1
@@ -4535,8 +4535,8 @@ define <64 x i1> @test_cmp_v64i16(<64 x
; AVX512F-NEXT: vpcmpgtb %ymm0, %ymm6, %ymm0
; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX512F-NEXT: vextracti128 $1, %ymm2, %xmm3
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
-; AVX512F-NEXT: # kill: %XMM2<def> %XMM2<kill> %YMM2<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
+; AVX512F-NEXT: # kill: %xmm2<def> %xmm2<kill> %ymm2<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -4822,8 +4822,8 @@ define <64 x i1> @test_cmp_v64i16(<64 x
; AVX512DQ-NEXT: vpcmpgtb %ymm0, %ymm6, %ymm0
; AVX512DQ-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX512DQ-NEXT: vextracti128 $1, %ymm2, %xmm3
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
-; AVX512DQ-NEXT: # kill: %XMM2<def> %XMM2<kill> %YMM2<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
+; AVX512DQ-NEXT: # kill: %xmm2<def> %xmm2<kill> %ymm2<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
@@ -7280,7 +7280,7 @@ define <32 x i1> @test_cmp_v32f64(<32 x
; AVX512BW-NEXT: kunpckbw %k1, %k2, %k1
; AVX512BW-NEXT: kunpckwd %k0, %k1, %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
%1 = fcmp ogt <32 x double> %a0, %a1
ret <32 x i1> %1
@@ -8165,7 +8165,7 @@ define <32 x i1> @test_cmp_v32i64(<32 x
; AVX512BW-NEXT: kunpckbw %k1, %k2, %k1
; AVX512BW-NEXT: kunpckwd %k0, %k1, %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
%1 = icmp sgt <32 x i64> %a0, %a1
ret <32 x i1> %1
Modified: llvm/trunk/test/CodeGen/X86/vector-extend-inreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-extend-inreg.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-extend-inreg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-extend-inreg.ll Tue Nov 28 09:15:09 2017
@@ -47,7 +47,7 @@ define i64 @extract_any_extend_vector_in
; X64-SSE-NEXT: movq %rsp, %rbp
; X64-SSE-NEXT: andq $-128, %rsp
; X64-SSE-NEXT: subq $256, %rsp # imm = 0x100
-; X64-SSE-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-SSE-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SSE-NEXT: psrldq {{.*#+}} xmm7 = xmm7[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
; X64-SSE-NEXT: xorps %xmm0, %xmm0
; X64-SSE-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
@@ -99,7 +99,7 @@ define i64 @extract_any_extend_vector_in
; X64-AVX-NEXT: movq %rsp, %rbp
; X64-AVX-NEXT: andq $-128, %rsp
; X64-AVX-NEXT: subq $256, %rsp # imm = 0x100
-; X64-AVX-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-AVX-NEXT: vpermpd {{.*#+}} ymm0 = ymm3[3,1,2,3]
; X64-AVX-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; X64-AVX-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]
Modified: llvm/trunk/test/CodeGen/X86/vector-half-conversions.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-half-conversions.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-half-conversions.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-half-conversions.ll Tue Nov 28 09:15:09 2017
@@ -28,7 +28,7 @@ define <4 x float> @cvt_4i16_to_4f32(<4
; AVX1-NEXT: movq %rax, %rcx
; AVX1-NEXT: movq %rax, %rdx
; AVX1-NEXT: movswl %ax, %esi
-; AVX1-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX1-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX1-NEXT: shrl $16, %eax
; AVX1-NEXT: shrq $32, %rcx
; AVX1-NEXT: shrq $48, %rdx
@@ -55,7 +55,7 @@ define <4 x float> @cvt_4i16_to_4f32(<4
; AVX2-NEXT: movq %rax, %rcx
; AVX2-NEXT: movq %rax, %rdx
; AVX2-NEXT: movswl %ax, %esi
-; AVX2-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX2-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX2-NEXT: shrl $16, %eax
; AVX2-NEXT: shrq $32, %rcx
; AVX2-NEXT: shrq $48, %rdx
@@ -82,7 +82,7 @@ define <4 x float> @cvt_4i16_to_4f32(<4
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: movq %rax, %rdx
; AVX512F-NEXT: movswl %ax, %esi
-; AVX512F-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512F-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512F-NEXT: shrl $16, %eax
; AVX512F-NEXT: shrq $32, %rcx
; AVX512F-NEXT: shrq $48, %rdx
@@ -109,7 +109,7 @@ define <4 x float> @cvt_4i16_to_4f32(<4
; AVX512VL-NEXT: movq %rax, %rcx
; AVX512VL-NEXT: movq %rax, %rdx
; AVX512VL-NEXT: movswl %ax, %esi
-; AVX512VL-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512VL-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512VL-NEXT: shrl $16, %eax
; AVX512VL-NEXT: shrq $32, %rcx
; AVX512VL-NEXT: shrq $48, %rdx
@@ -140,7 +140,7 @@ define <4 x float> @cvt_8i16_to_4f32(<8
; AVX1-NEXT: movq %rax, %rcx
; AVX1-NEXT: movq %rax, %rdx
; AVX1-NEXT: movswl %ax, %esi
-; AVX1-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX1-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX1-NEXT: shrl $16, %eax
; AVX1-NEXT: shrq $32, %rcx
; AVX1-NEXT: shrq $48, %rdx
@@ -166,7 +166,7 @@ define <4 x float> @cvt_8i16_to_4f32(<8
; AVX2-NEXT: movq %rax, %rcx
; AVX2-NEXT: movq %rax, %rdx
; AVX2-NEXT: movswl %ax, %esi
-; AVX2-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX2-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX2-NEXT: shrl $16, %eax
; AVX2-NEXT: shrq $32, %rcx
; AVX2-NEXT: shrq $48, %rdx
@@ -192,7 +192,7 @@ define <4 x float> @cvt_8i16_to_4f32(<8
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: movq %rax, %rdx
; AVX512F-NEXT: movswl %ax, %esi
-; AVX512F-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512F-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512F-NEXT: shrl $16, %eax
; AVX512F-NEXT: shrq $32, %rcx
; AVX512F-NEXT: shrq $48, %rdx
@@ -220,7 +220,7 @@ define <4 x float> @cvt_8i16_to_4f32(<8
; AVX512VL-NEXT: movq %rax, %rcx
; AVX512VL-NEXT: movq %rax, %rdx
; AVX512VL-NEXT: movswl %ax, %esi
-; AVX512VL-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512VL-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512VL-NEXT: shrl $16, %eax
; AVX512VL-NEXT: shrq $32, %rcx
; AVX512VL-NEXT: shrq $48, %rdx
@@ -252,7 +252,7 @@ define <8 x float> @cvt_8i16_to_8f32(<8
; ALL-NEXT: movq %rdx, %r8
; ALL-NEXT: movq %rdx, %r10
; ALL-NEXT: movswl %dx, %r9d
-; ALL-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<kill>
+; ALL-NEXT: # kill: %edx<def> %edx<kill> %rdx<kill>
; ALL-NEXT: shrl $16, %edx
; ALL-NEXT: shrq $32, %r8
; ALL-NEXT: shrq $48, %r10
@@ -260,7 +260,7 @@ define <8 x float> @cvt_8i16_to_8f32(<8
; ALL-NEXT: movq %rdi, %rax
; ALL-NEXT: movq %rdi, %rsi
; ALL-NEXT: movswl %di, %ecx
-; ALL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<kill>
+; ALL-NEXT: # kill: %edi<def> %edi<kill> %rdi<kill>
; ALL-NEXT: shrl $16, %edi
; ALL-NEXT: shrq $32, %rax
; ALL-NEXT: shrq $48, %rsi
@@ -313,7 +313,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX1-NEXT: movswl %cx, %ecx
; AVX1-NEXT: vmovd %ecx, %xmm9
; AVX1-NEXT: movswl %ax, %ecx
-; AVX1-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX1-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX1-NEXT: shrl $16, %eax
; AVX1-NEXT: cwtl
; AVX1-NEXT: vmovd %eax, %xmm10
@@ -328,7 +328,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX1-NEXT: movswl %cx, %ecx
; AVX1-NEXT: vmovd %ecx, %xmm13
; AVX1-NEXT: movswl %ax, %ecx
-; AVX1-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX1-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX1-NEXT: shrl $16, %eax
; AVX1-NEXT: cwtl
; AVX1-NEXT: vmovd %eax, %xmm14
@@ -343,7 +343,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX1-NEXT: movswl %cx, %ecx
; AVX1-NEXT: vmovd %ecx, %xmm3
; AVX1-NEXT: movswl %ax, %ecx
-; AVX1-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX1-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX1-NEXT: shrl $16, %eax
; AVX1-NEXT: cwtl
; AVX1-NEXT: vmovd %eax, %xmm4
@@ -408,7 +408,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX2-NEXT: movswl %cx, %ecx
; AVX2-NEXT: vmovd %ecx, %xmm9
; AVX2-NEXT: movswl %ax, %ecx
-; AVX2-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX2-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX2-NEXT: shrl $16, %eax
; AVX2-NEXT: cwtl
; AVX2-NEXT: vmovd %eax, %xmm10
@@ -423,7 +423,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX2-NEXT: movswl %cx, %ecx
; AVX2-NEXT: vmovd %ecx, %xmm13
; AVX2-NEXT: movswl %ax, %ecx
-; AVX2-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX2-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX2-NEXT: shrl $16, %eax
; AVX2-NEXT: cwtl
; AVX2-NEXT: vmovd %eax, %xmm14
@@ -438,7 +438,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX2-NEXT: movswl %cx, %ecx
; AVX2-NEXT: vmovd %ecx, %xmm3
; AVX2-NEXT: movswl %ax, %ecx
-; AVX2-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX2-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX2-NEXT: shrl $16, %eax
; AVX2-NEXT: cwtl
; AVX2-NEXT: vmovd %eax, %xmm4
@@ -503,7 +503,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX512F-NEXT: movswl %cx, %ecx
; AVX512F-NEXT: vmovd %ecx, %xmm9
; AVX512F-NEXT: movswl %ax, %ecx
-; AVX512F-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512F-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512F-NEXT: shrl $16, %eax
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm11
@@ -518,7 +518,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX512F-NEXT: movswl %cx, %ecx
; AVX512F-NEXT: vmovd %ecx, %xmm14
; AVX512F-NEXT: movswl %ax, %ecx
-; AVX512F-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512F-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512F-NEXT: shrl $16, %eax
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm15
@@ -533,7 +533,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX512F-NEXT: movswl %cx, %ecx
; AVX512F-NEXT: vmovd %ecx, %xmm1
; AVX512F-NEXT: movswl %ax, %ecx
-; AVX512F-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512F-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512F-NEXT: shrl $16, %eax
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm4
@@ -599,7 +599,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX512VL-NEXT: movswl %cx, %ecx
; AVX512VL-NEXT: vmovd %ecx, %xmm9
; AVX512VL-NEXT: movswl %ax, %ecx
-; AVX512VL-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512VL-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512VL-NEXT: shrl $16, %eax
; AVX512VL-NEXT: cwtl
; AVX512VL-NEXT: vmovd %eax, %xmm11
@@ -614,7 +614,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX512VL-NEXT: movswl %cx, %ecx
; AVX512VL-NEXT: vmovd %ecx, %xmm14
; AVX512VL-NEXT: movswl %ax, %ecx
-; AVX512VL-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512VL-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512VL-NEXT: shrl $16, %eax
; AVX512VL-NEXT: cwtl
; AVX512VL-NEXT: vmovd %eax, %xmm15
@@ -629,7 +629,7 @@ define <16 x float> @cvt_16i16_to_16f32(
; AVX512VL-NEXT: movswl %cx, %ecx
; AVX512VL-NEXT: vmovd %ecx, %xmm18
; AVX512VL-NEXT: movswl %ax, %ecx
-; AVX512VL-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512VL-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512VL-NEXT: shrl $16, %eax
; AVX512VL-NEXT: cwtl
; AVX512VL-NEXT: vmovd %eax, %xmm19
@@ -735,7 +735,7 @@ define <4 x float> @load_cvt_8i16_to_4f3
; AVX1-NEXT: movq %rax, %rcx
; AVX1-NEXT: movq %rax, %rdx
; AVX1-NEXT: movswl %ax, %esi
-; AVX1-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX1-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX1-NEXT: shrl $16, %eax
; AVX1-NEXT: shrq $32, %rcx
; AVX1-NEXT: shrq $48, %rdx
@@ -761,7 +761,7 @@ define <4 x float> @load_cvt_8i16_to_4f3
; AVX2-NEXT: movq %rax, %rcx
; AVX2-NEXT: movq %rax, %rdx
; AVX2-NEXT: movswl %ax, %esi
-; AVX2-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX2-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX2-NEXT: shrl $16, %eax
; AVX2-NEXT: shrq $32, %rcx
; AVX2-NEXT: shrq $48, %rdx
@@ -787,7 +787,7 @@ define <4 x float> @load_cvt_8i16_to_4f3
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: movq %rax, %rdx
; AVX512F-NEXT: movswl %ax, %esi
-; AVX512F-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512F-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512F-NEXT: shrl $16, %eax
; AVX512F-NEXT: shrq $32, %rcx
; AVX512F-NEXT: shrq $48, %rdx
@@ -815,7 +815,7 @@ define <4 x float> @load_cvt_8i16_to_4f3
; AVX512VL-NEXT: movq %rax, %rcx
; AVX512VL-NEXT: movq %rax, %rdx
; AVX512VL-NEXT: movswl %ax, %esi
-; AVX512VL-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; AVX512VL-NEXT: # kill: %eax<def> %eax<kill> %rax<kill>
; AVX512VL-NEXT: shrl $16, %eax
; AVX512VL-NEXT: shrq $32, %rcx
; AVX512VL-NEXT: shrq $48, %rdx
@@ -2061,7 +2061,7 @@ define i16 @cvt_f32_to_i16(float %a0) no
; ALL: # BB#0:
; ALL-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; ALL-NEXT: vmovd %xmm0, %eax
-; ALL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; ALL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; ALL-NEXT: retq
%1 = fptrunc float %a0 to half
%2 = bitcast half %1 to i16
@@ -3139,7 +3139,7 @@ define <4 x i16> @cvt_4f64_to_4i16(<4 x
; AVX1-NEXT: movl %eax, %ebx
; AVX1-NEXT: shll $16, %ebx
; AVX1-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movzwl %ax, %r14d
@@ -3176,7 +3176,7 @@ define <4 x i16> @cvt_4f64_to_4i16(<4 x
; AVX2-NEXT: movl %eax, %ebx
; AVX2-NEXT: shll $16, %ebx
; AVX2-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movzwl %ax, %r14d
@@ -3213,7 +3213,7 @@ define <4 x i16> @cvt_4f64_to_4i16(<4 x
; AVX512-NEXT: movl %eax, %ebx
; AVX512-NEXT: shll $16, %ebx
; AVX512-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq __truncdfhf2
; AVX512-NEXT: movzwl %ax, %r14d
@@ -3255,7 +3255,7 @@ define <8 x i16> @cvt_4f64_to_8i16_undef
; AVX1-NEXT: movl %eax, %ebx
; AVX1-NEXT: shll $16, %ebx
; AVX1-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movzwl %ax, %r14d
@@ -3293,7 +3293,7 @@ define <8 x i16> @cvt_4f64_to_8i16_undef
; AVX2-NEXT: movl %eax, %ebx
; AVX2-NEXT: shll $16, %ebx
; AVX2-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movzwl %ax, %r14d
@@ -3331,7 +3331,7 @@ define <8 x i16> @cvt_4f64_to_8i16_undef
; AVX512F-NEXT: movl %eax, %ebx
; AVX512F-NEXT: shll $16, %ebx
; AVX512F-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: callq __truncdfhf2
; AVX512F-NEXT: movzwl %ax, %r14d
@@ -3369,7 +3369,7 @@ define <8 x i16> @cvt_4f64_to_8i16_undef
; AVX512VL-NEXT: movl %eax, %ebx
; AVX512VL-NEXT: shll $16, %ebx
; AVX512VL-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX512VL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512VL-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: callq __truncdfhf2
; AVX512VL-NEXT: movzwl %ax, %r14d
@@ -3414,7 +3414,7 @@ define <8 x i16> @cvt_4f64_to_8i16_zero(
; AVX1-NEXT: movl %eax, %ebx
; AVX1-NEXT: shll $16, %ebx
; AVX1-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movzwl %ax, %r14d
@@ -3452,7 +3452,7 @@ define <8 x i16> @cvt_4f64_to_8i16_zero(
; AVX2-NEXT: movl %eax, %ebx
; AVX2-NEXT: shll $16, %ebx
; AVX2-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movzwl %ax, %r14d
@@ -3490,7 +3490,7 @@ define <8 x i16> @cvt_4f64_to_8i16_zero(
; AVX512F-NEXT: movl %eax, %ebx
; AVX512F-NEXT: shll $16, %ebx
; AVX512F-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: callq __truncdfhf2
; AVX512F-NEXT: movzwl %ax, %r14d
@@ -3528,7 +3528,7 @@ define <8 x i16> @cvt_4f64_to_8i16_zero(
; AVX512VL-NEXT: movl %eax, %ebx
; AVX512VL-NEXT: shll $16, %ebx
; AVX512VL-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX512VL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512VL-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: callq __truncdfhf2
; AVX512VL-NEXT: movzwl %ax, %r14d
@@ -3577,7 +3577,7 @@ define <8 x i16> @cvt_8f64_to_8i16(<8 x
; AVX1-NEXT: movl %eax, %ebx
; AVX1-NEXT: shll $16, %ebx
; AVX1-NEXT: vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movzwl %ax, %r15d
@@ -3602,7 +3602,7 @@ define <8 x i16> @cvt_8f64_to_8i16(<8 x
; AVX1-NEXT: movl %eax, %ebx
; AVX1-NEXT: shll $16, %ebx
; AVX1-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movzwl %ax, %r15d
@@ -3644,7 +3644,7 @@ define <8 x i16> @cvt_8f64_to_8i16(<8 x
; AVX2-NEXT: movl %eax, %ebx
; AVX2-NEXT: shll $16, %ebx
; AVX2-NEXT: vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movzwl %ax, %r15d
@@ -3669,7 +3669,7 @@ define <8 x i16> @cvt_8f64_to_8i16(<8 x
; AVX2-NEXT: movl %eax, %ebx
; AVX2-NEXT: shll $16, %ebx
; AVX2-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movzwl %ax, %r15d
@@ -3710,7 +3710,7 @@ define <8 x i16> @cvt_8f64_to_8i16(<8 x
; AVX512-NEXT: movl %eax, %ebx
; AVX512-NEXT: shll $16, %ebx
; AVX512-NEXT: vmovups (%rsp), %zmm0 # 64-byte Reload
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq __truncdfhf2
; AVX512-NEXT: movzwl %ax, %r15d
@@ -3738,7 +3738,7 @@ define <8 x i16> @cvt_8f64_to_8i16(<8 x
; AVX512-NEXT: movl %eax, %ebx
; AVX512-NEXT: shll $16, %ebx
; AVX512-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq __truncdfhf2
; AVX512-NEXT: movzwl %ax, %r15d
@@ -3836,7 +3836,7 @@ define void @store_cvt_4f64_to_4i16(<4 x
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movl %eax, %r15d
; AVX1-NEXT: vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movl %eax, %ebp
@@ -3874,7 +3874,7 @@ define void @store_cvt_4f64_to_4i16(<4 x
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movl %eax, %r15d
; AVX2-NEXT: vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movl %eax, %ebp
@@ -3912,7 +3912,7 @@ define void @store_cvt_4f64_to_4i16(<4 x
; AVX512-NEXT: callq __truncdfhf2
; AVX512-NEXT: movl %eax, %r15d
; AVX512-NEXT: vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq __truncdfhf2
; AVX512-NEXT: movl %eax, %ebp
@@ -3949,7 +3949,7 @@ define void @store_cvt_4f64_to_8i16_unde
; AVX1-NEXT: movl %eax, %ebp
; AVX1-NEXT: shll $16, %ebp
; AVX1-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movzwl %ax, %ebx
@@ -3991,7 +3991,7 @@ define void @store_cvt_4f64_to_8i16_unde
; AVX2-NEXT: movl %eax, %ebp
; AVX2-NEXT: shll $16, %ebp
; AVX2-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movzwl %ax, %ebx
@@ -4033,7 +4033,7 @@ define void @store_cvt_4f64_to_8i16_unde
; AVX512F-NEXT: movl %eax, %ebp
; AVX512F-NEXT: shll $16, %ebp
; AVX512F-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: callq __truncdfhf2
; AVX512F-NEXT: movzwl %ax, %ebx
@@ -4075,7 +4075,7 @@ define void @store_cvt_4f64_to_8i16_unde
; AVX512VL-NEXT: movl %eax, %ebp
; AVX512VL-NEXT: shll $16, %ebp
; AVX512VL-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX512VL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512VL-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: callq __truncdfhf2
; AVX512VL-NEXT: movzwl %ax, %ebx
@@ -4125,7 +4125,7 @@ define void @store_cvt_4f64_to_8i16_zero
; AVX1-NEXT: movl %eax, %ebp
; AVX1-NEXT: shll $16, %ebp
; AVX1-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movzwl %ax, %ebx
@@ -4167,7 +4167,7 @@ define void @store_cvt_4f64_to_8i16_zero
; AVX2-NEXT: movl %eax, %ebp
; AVX2-NEXT: shll $16, %ebp
; AVX2-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movzwl %ax, %ebx
@@ -4209,7 +4209,7 @@ define void @store_cvt_4f64_to_8i16_zero
; AVX512F-NEXT: movl %eax, %ebp
; AVX512F-NEXT: shll $16, %ebp
; AVX512F-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: callq __truncdfhf2
; AVX512F-NEXT: movzwl %ax, %ebx
@@ -4251,7 +4251,7 @@ define void @store_cvt_4f64_to_8i16_zero
; AVX512VL-NEXT: movl %eax, %ebp
; AVX512VL-NEXT: shll $16, %ebp
; AVX512VL-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
-; AVX512VL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512VL-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: callq __truncdfhf2
; AVX512VL-NEXT: movzwl %ax, %ebx
@@ -4324,7 +4324,7 @@ define void @store_cvt_8f64_to_8i16(<8 x
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movl %eax, %r13d
; AVX1-NEXT: vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movl %eax, %ebp
@@ -4332,7 +4332,7 @@ define void @store_cvt_8f64_to_8i16(<8 x
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movl %eax, %r14d
; AVX1-NEXT: vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: callq __truncdfhf2
; AVX1-NEXT: movl %eax, %r15d
@@ -4392,7 +4392,7 @@ define void @store_cvt_8f64_to_8i16(<8 x
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movl %eax, %r13d
; AVX2-NEXT: vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movl %eax, %ebp
@@ -4400,7 +4400,7 @@ define void @store_cvt_8f64_to_8i16(<8 x
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movl %eax, %r14d
; AVX2-NEXT: vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: callq __truncdfhf2
; AVX2-NEXT: movl %eax, %r15d
@@ -4462,7 +4462,7 @@ define void @store_cvt_8f64_to_8i16(<8 x
; AVX512-NEXT: callq __truncdfhf2
; AVX512-NEXT: movl %eax, %r13d
; AVX512-NEXT: vmovups {{[0-9]+}}(%rsp), %zmm0 # 64-byte Reload
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq __truncdfhf2
; AVX512-NEXT: movl %eax, %ebp
@@ -4470,7 +4470,7 @@ define void @store_cvt_8f64_to_8i16(<8 x
; AVX512-NEXT: callq __truncdfhf2
; AVX512-NEXT: movl %eax, %r14d
; AVX512-NEXT: vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: callq __truncdfhf2
; AVX512-NEXT: movl %eax, %r15d
Modified: llvm/trunk/test/CodeGen/X86/vector-lzcnt-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-lzcnt-128.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-lzcnt-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-lzcnt-128.ll Tue Nov 28 09:15:09 2017
@@ -233,9 +233,9 @@ define <2 x i64> @testv2i64(<2 x i64> %i
;
; AVX512CD-LABEL: testv2i64:
; AVX512CD: # BB#0:
-; AVX512CD-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512CD-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512CD-NEXT: vplzcntq %zmm0, %zmm0
-; AVX512CD-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512CD-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512CD-NEXT: vzeroupper
; AVX512CD-NEXT: retq
;
@@ -499,9 +499,9 @@ define <2 x i64> @testv2i64u(<2 x i64> %
;
; AVX512CD-LABEL: testv2i64u:
; AVX512CD: # BB#0:
-; AVX512CD-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512CD-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512CD-NEXT: vplzcntq %zmm0, %zmm0
-; AVX512CD-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512CD-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512CD-NEXT: vzeroupper
; AVX512CD-NEXT: retq
;
@@ -747,9 +747,9 @@ define <4 x i32> @testv4i32(<4 x i32> %i
;
; AVX512CD-LABEL: testv4i32:
; AVX512CD: # BB#0:
-; AVX512CD-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512CD-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512CD-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512CD-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512CD-NEXT: vzeroupper
; AVX512CD-NEXT: retq
;
@@ -989,9 +989,9 @@ define <4 x i32> @testv4i32u(<4 x i32> %
;
; AVX512CD-LABEL: testv4i32u:
; AVX512CD: # BB#0:
-; AVX512CD-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512CD-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512CD-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512CD-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512CD-NEXT: vzeroupper
; AVX512CD-NEXT: retq
;
Modified: llvm/trunk/test/CodeGen/X86/vector-lzcnt-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-lzcnt-256.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-lzcnt-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-lzcnt-256.ll Tue Nov 28 09:15:09 2017
@@ -162,9 +162,9 @@ define <4 x i64> @testv4i64(<4 x i64> %i
;
; AVX512CD-LABEL: testv4i64:
; AVX512CD: # BB#0:
-; AVX512CD-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512CD-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512CD-NEXT: vplzcntq %zmm0, %zmm0
-; AVX512CD-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512CD-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512CD-NEXT: retq
;
; X32-AVX-LABEL: testv4i64:
@@ -354,9 +354,9 @@ define <4 x i64> @testv4i64u(<4 x i64> %
;
; AVX512CD-LABEL: testv4i64u:
; AVX512CD: # BB#0:
-; AVX512CD-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512CD-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512CD-NEXT: vplzcntq %zmm0, %zmm0
-; AVX512CD-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512CD-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512CD-NEXT: retq
;
; X32-AVX-LABEL: testv4i64u:
@@ -521,9 +521,9 @@ define <8 x i32> @testv8i32(<8 x i32> %i
;
; AVX512CD-LABEL: testv8i32:
; AVX512CD: # BB#0:
-; AVX512CD-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512CD-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512CD-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512CD-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512CD-NEXT: retq
;
; X32-AVX-LABEL: testv8i32:
@@ -683,9 +683,9 @@ define <8 x i32> @testv8i32u(<8 x i32> %
;
; AVX512CD-LABEL: testv8i32u:
; AVX512CD: # BB#0:
-; AVX512CD-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512CD-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0
-; AVX512CD-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512CD-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512CD-NEXT: retq
;
; X32-AVX-LABEL: testv8i32u:
Modified: llvm/trunk/test/CodeGen/X86/vector-popcnt-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-popcnt-128.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-popcnt-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-popcnt-128.ll Tue Nov 28 09:15:09 2017
@@ -114,9 +114,9 @@ define <2 x i64> @testv2i64(<2 x i64> %i
;
; AVX512VPOPCNTDQ-LABEL: testv2i64:
; AVX512VPOPCNTDQ: # BB#0:
-; AVX512VPOPCNTDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512VPOPCNTDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512VPOPCNTDQ-NEXT: vpopcntq %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: vzeroupper
; AVX512VPOPCNTDQ-NEXT: retq
;
@@ -284,9 +284,9 @@ define <4 x i32> @testv4i32(<4 x i32> %i
;
; AVX512VPOPCNTDQ-LABEL: testv4i32:
; AVX512VPOPCNTDQ: # BB#0:
-; AVX512VPOPCNTDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512VPOPCNTDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512VPOPCNTDQ-NEXT: vpopcntd %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: vzeroupper
; AVX512VPOPCNTDQ-NEXT: retq
;
@@ -450,9 +450,9 @@ define <8 x i16> @testv8i16(<8 x i16> %i
;
; BITALG_NOVLX-LABEL: testv8i16:
; BITALG_NOVLX: # BB#0:
-; BITALG_NOVLX-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; BITALG_NOVLX-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; BITALG_NOVLX-NEXT: vpopcntw %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: vzeroupper
; BITALG_NOVLX-NEXT: retq
;
@@ -567,9 +567,9 @@ define <16 x i8> @testv16i8(<16 x i8> %i
;
; BITALG_NOVLX-LABEL: testv16i8:
; BITALG_NOVLX: # BB#0:
-; BITALG_NOVLX-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; BITALG_NOVLX-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; BITALG_NOVLX-NEXT: vpopcntb %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: vzeroupper
; BITALG_NOVLX-NEXT: retq
;
Modified: llvm/trunk/test/CodeGen/X86/vector-popcnt-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-popcnt-256.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-popcnt-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-popcnt-256.ll Tue Nov 28 09:15:09 2017
@@ -45,9 +45,9 @@ define <4 x i64> @testv4i64(<4 x i64> %i
;
; AVX512VPOPCNTDQ-LABEL: testv4i64:
; AVX512VPOPCNTDQ: # BB#0:
-; AVX512VPOPCNTDQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512VPOPCNTDQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512VPOPCNTDQ-NEXT: vpopcntq %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: retq
;
; BITALG_NOVLX-LABEL: testv4i64:
@@ -133,9 +133,9 @@ define <8 x i32> @testv8i32(<8 x i32> %i
;
; AVX512VPOPCNTDQ-LABEL: testv8i32:
; AVX512VPOPCNTDQ: # BB#0:
-; AVX512VPOPCNTDQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512VPOPCNTDQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512VPOPCNTDQ-NEXT: vpopcntd %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: retq
;
; BITALG_NOVLX-LABEL: testv8i32:
@@ -228,9 +228,9 @@ define <16 x i16> @testv16i16(<16 x i16>
;
; BITALG_NOVLX-LABEL: testv16i16:
; BITALG_NOVLX: # BB#0:
-; BITALG_NOVLX-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; BITALG_NOVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; BITALG_NOVLX-NEXT: vpopcntw %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: retq
;
; BITALG-LABEL: testv16i16:
@@ -288,9 +288,9 @@ define <32 x i8> @testv32i8(<32 x i8> %i
;
; BITALG_NOVLX-LABEL: testv32i8:
; BITALG_NOVLX: # BB#0:
-; BITALG_NOVLX-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; BITALG_NOVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; BITALG_NOVLX-NEXT: vpopcntb %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: retq
;
; BITALG-LABEL: testv32i8:
Modified: llvm/trunk/test/CodeGen/X86/vector-rotate-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-rotate-128.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-rotate-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-rotate-128.ll Tue Nov 28 09:15:09 2017
@@ -78,10 +78,10 @@ define <2 x i64> @var_rotate_v2i64(<2 x
;
; AVX512BW-LABEL: var_rotate_v2i64:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprolvq %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -219,10 +219,10 @@ define <4 x i32> @var_rotate_v4i32(<4 x
;
; AVX512BW-LABEL: var_rotate_v4i32:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprolvd %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -462,8 +462,8 @@ define <8 x i16> @var_rotate_v8i16(<8 x
;
; AVX512BW-LABEL: var_rotate_v8i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16]
; AVX512BW-NEXT: vpsubw %xmm1, %xmm2, %xmm2
; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm1
@@ -838,10 +838,10 @@ define <2 x i64> @constant_rotate_v2i64(
;
; AVX512BW-LABEL: constant_rotate_v2i64:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [4,14]
; AVX512BW-NEXT: vprolvq %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -940,10 +940,10 @@ define <4 x i32> @constant_rotate_v4i32(
;
; AVX512BW-LABEL: constant_rotate_v4i32:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [4,5,6,7]
; AVX512BW-NEXT: vprolvd %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -1067,7 +1067,7 @@ define <8 x i16> @constant_rotate_v8i16(
;
; AVX512BW-LABEL: constant_rotate_v8i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7]
; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm1
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [16,15,14,13,12,11,10,9]
@@ -1350,9 +1350,9 @@ define <2 x i64> @splatconstant_rotate_v
;
; AVX512BW-LABEL: splatconstant_rotate_v2i64:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprolq $14, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -1397,9 +1397,9 @@ define <4 x i32> @splatconstant_rotate_v
;
; AVX512BW-LABEL: splatconstant_rotate_v4i32:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprold $4, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -1535,7 +1535,7 @@ define <2 x i64> @splatconstant_rotate_m
;
; AVX512BW-LABEL: splatconstant_rotate_mask_v2i64:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprolq $15, %zmm0, %zmm0
; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; AVX512BW-NEXT: vzeroupper
@@ -1587,7 +1587,7 @@ define <4 x i32> @splatconstant_rotate_m
;
; AVX512BW-LABEL: splatconstant_rotate_mask_v4i32:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprold $4, %zmm0, %zmm0
; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; AVX512BW-NEXT: vzeroupper
Modified: llvm/trunk/test/CodeGen/X86/vector-rotate-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-rotate-256.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-rotate-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-rotate-256.ll Tue Nov 28 09:15:09 2017
@@ -50,10 +50,10 @@ define <4 x i64> @var_rotate_v4i64(<4 x
;
; AVX512BW-LABEL: var_rotate_v4i64:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprolvq %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: var_rotate_v4i64:
@@ -141,10 +141,10 @@ define <8 x i32> @var_rotate_v8i32(<8 x
;
; AVX512BW-LABEL: var_rotate_v8i32:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprolvd %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: var_rotate_v8i32:
@@ -271,8 +271,8 @@ define <16 x i16> @var_rotate_v16i16(<16
;
; AVX512BW-LABEL: var_rotate_v16i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
; AVX512BW-NEXT: vpsubw %ymm1, %ymm2, %ymm2
; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm1
@@ -479,10 +479,10 @@ define <4 x i64> @constant_rotate_v4i64(
;
; AVX512BW-LABEL: constant_rotate_v4i64:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [4,14,50,60]
; AVX512BW-NEXT: vprolvq %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: constant_rotate_v4i64:
@@ -545,10 +545,10 @@ define <8 x i32> @constant_rotate_v8i32(
;
; AVX512BW-LABEL: constant_rotate_v8i32:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [4,5,6,7,8,9,10,11]
; AVX512BW-NEXT: vprolvd %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: constant_rotate_v8i32:
@@ -623,7 +623,7 @@ define <16 x i16> @constant_rotate_v16i1
;
; AVX512BW-LABEL: constant_rotate_v16i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm1
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1]
@@ -800,9 +800,9 @@ define <4 x i64> @splatconstant_rotate_v
;
; AVX512BW-LABEL: splatconstant_rotate_v4i64:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprolq $14, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: splatconstant_rotate_v4i64:
@@ -853,9 +853,9 @@ define <8 x i32> @splatconstant_rotate_v
;
; AVX512BW-LABEL: splatconstant_rotate_v8i32:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprold $4, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: splatconstant_rotate_v8i32:
@@ -1012,7 +1012,7 @@ define <4 x i64> @splatconstant_rotate_m
;
; AVX512BW-LABEL: splatconstant_rotate_mask_v4i64:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprolq $15, %zmm0, %zmm0
; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0
; AVX512BW-NEXT: retq
@@ -1074,7 +1074,7 @@ define <8 x i32> @splatconstant_rotate_m
;
; AVX512BW-LABEL: splatconstant_rotate_mask_v8i32:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vprold $4, %zmm0, %zmm0
; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0
; AVX512BW-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/vector-sext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-sext.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-sext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-sext.ll Tue Nov 28 09:15:09 2017
@@ -1245,7 +1245,7 @@ define <2 x i64> @load_sext_2i1_to_2i64(
; AVX512F-NEXT: movzbl (%rdi), %eax
; AVX512F-NEXT: kmovw %eax, %k1
; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -1254,7 +1254,7 @@ define <2 x i64> @load_sext_2i1_to_2i64(
; AVX512BW-NEXT: movzbl (%rdi), %eax
; AVX512BW-NEXT: kmovd %eax, %k1
; AVX512BW-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -1437,7 +1437,7 @@ define <4 x i32> @load_sext_4i1_to_4i32(
; AVX512F-NEXT: kmovw %eax, %k1
; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
; AVX512F-NEXT: vpmovqd %zmm0, %ymm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -1447,7 +1447,7 @@ define <4 x i32> @load_sext_4i1_to_4i32(
; AVX512BW-NEXT: kmovd %eax, %k1
; AVX512BW-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -1643,7 +1643,7 @@ define <4 x i64> @load_sext_4i1_to_4i64(
; AVX512F-NEXT: movzbl (%rdi), %eax
; AVX512F-NEXT: kmovw %eax, %k1
; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: load_sext_4i1_to_4i64:
@@ -1651,7 +1651,7 @@ define <4 x i64> @load_sext_4i1_to_4i64(
; AVX512BW-NEXT: movzbl (%rdi), %eax
; AVX512BW-NEXT: kmovd %eax, %k1
; AVX512BW-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; X32-SSE41-LABEL: load_sext_4i1_to_4i64:
@@ -2009,7 +2009,7 @@ define <8 x i16> @load_sext_8i1_to_8i16(
; AVX512BW-NEXT: movzbl (%rdi), %eax
; AVX512BW-NEXT: kmovd %eax, %k0
; AVX512BW-NEXT: vpmovm2w %k0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -2921,7 +2921,7 @@ define <16 x i8> @load_sext_16i1_to_16i8
; AVX512BW: # BB#0: # %entry
; AVX512BW-NEXT: kmovw (%rdi), %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -3442,7 +3442,7 @@ define <16 x i16> @load_sext_16i1_to_16i
; AVX512BW: # BB#0: # %entry
; AVX512BW-NEXT: kmovw (%rdi), %k0
; AVX512BW-NEXT: vpmovm2w %k0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; X32-SSE41-LABEL: load_sext_16i1_to_16i16:
@@ -4297,7 +4297,7 @@ define <32 x i8> @load_sext_32i1_to_32i8
; AVX512BW: # BB#0: # %entry
; AVX512BW-NEXT: kmovd (%rdi), %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; X32-SSE41-LABEL: load_sext_32i1_to_32i8:
@@ -5030,7 +5030,7 @@ define <32 x i8> @sext_32xi1_to_32xi8(<3
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpcmpeqw %zmm1, %zmm0, %k0
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; X32-SSE41-LABEL: sext_32xi1_to_32xi8:
Modified: llvm/trunk/test/CodeGen/X86/vector-shift-ashr-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shift-ashr-128.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shift-ashr-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shift-ashr-128.ll Tue Nov 28 09:15:09 2017
@@ -82,10 +82,10 @@ define <2 x i64> @var_shift_v2i64(<2 x i
;
; AVX512-LABEL: var_shift_v2i64:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512-NEXT: vpsravq %zmm1, %zmm0, %zmm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
@@ -336,16 +336,16 @@ define <8 x i16> @var_shift_v8i16(<8 x i
; AVX512DQ-NEXT: vpmovsxwd %xmm0, %ymm0
; AVX512DQ-NEXT: vpsravd %ymm1, %ymm0, %ymm0
; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512BW-LABEL: var_shift_v8i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpsravw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -651,9 +651,9 @@ define <2 x i64> @splatvar_shift_v2i64(<
;
; AVX512-LABEL: splatvar_shift_v2i64:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512-NEXT: vpsraq %xmm1, %zmm0, %zmm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
@@ -1087,10 +1087,10 @@ define <2 x i64> @constant_shift_v2i64(<
;
; AVX512-LABEL: constant_shift_v2i64:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512-NEXT: vmovdqa {{.*#+}} xmm1 = [1,7]
; AVX512-NEXT: vpsravq %zmm1, %zmm0, %zmm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
@@ -1265,16 +1265,16 @@ define <8 x i16> @constant_shift_v8i16(<
; AVX512DQ-NEXT: vpmovsxwd %xmm0, %ymm0
; AVX512DQ-NEXT: vpsravd {{.*}}(%rip), %ymm0, %ymm0
; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512BW-LABEL: constant_shift_v8i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7]
; AVX512BW-NEXT: vpsravw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -1564,9 +1564,9 @@ define <2 x i64> @splatconstant_shift_v2
;
; AVX512-LABEL: splatconstant_shift_v2i64:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512-NEXT: vpsraq $7, %zmm0, %zmm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
Modified: llvm/trunk/test/CodeGen/X86/vector-shift-ashr-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shift-ashr-256.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shift-ashr-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shift-ashr-256.ll Tue Nov 28 09:15:09 2017
@@ -75,10 +75,10 @@ define <4 x i64> @var_shift_v4i64(<4 x i
;
; AVX512-LABEL: var_shift_v4i64:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpsravq %zmm1, %zmm0, %zmm0
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512-NEXT: retq
;
; AVX512VL-LABEL: var_shift_v4i64:
@@ -309,10 +309,10 @@ define <16 x i16> @var_shift_v16i16(<16
;
; AVX512BW-LABEL: var_shift_v16i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpsravw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512DQVL-LABEL: var_shift_v16i16:
@@ -696,9 +696,9 @@ define <4 x i64> @splatvar_shift_v4i64(<
;
; AVX512-LABEL: splatvar_shift_v4i64:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpsraq %xmm1, %zmm0, %zmm0
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512-NEXT: retq
;
; AVX512VL-LABEL: splatvar_shift_v4i64:
@@ -1170,10 +1170,10 @@ define <4 x i64> @constant_shift_v4i64(<
;
; AVX512-LABEL: constant_shift_v4i64:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [1,7,31,62]
; AVX512-NEXT: vpsravq %zmm1, %zmm0, %zmm0
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512-NEXT: retq
;
; AVX512VL-LABEL: constant_shift_v4i64:
@@ -1360,10 +1360,10 @@ define <16 x i16> @constant_shift_v16i16
;
; AVX512BW-LABEL: constant_shift_v16i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512BW-NEXT: vpsravw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512DQVL-LABEL: constant_shift_v16i16:
@@ -1702,9 +1702,9 @@ define <4 x i64> @splatconstant_shift_v4
;
; AVX512-LABEL: splatconstant_shift_v4i64:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpsraq $7, %zmm0, %zmm0
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512-NEXT: retq
;
; AVX512VL-LABEL: splatconstant_shift_v4i64:
Modified: llvm/trunk/test/CodeGen/X86/vector-shift-lshr-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shift-lshr-128.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shift-lshr-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shift-lshr-128.ll Tue Nov 28 09:15:09 2017
@@ -290,7 +290,7 @@ define <8 x i16> @var_shift_v8i16(<8 x i
; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -307,16 +307,16 @@ define <8 x i16> @var_shift_v8i16(<8 x i
; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512DQ-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512BW-LABEL: var_shift_v8i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -1010,7 +1010,7 @@ define <8 x i16> @constant_shift_v8i16(<
; AVX2-NEXT: vpsrlvd {{.*}}(%rip), %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -1026,16 +1026,16 @@ define <8 x i16> @constant_shift_v8i16(<
; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512DQ-NEXT: vpsrlvd {{.*}}(%rip), %ymm0, %ymm0
; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512BW-LABEL: constant_shift_v8i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7]
; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
Modified: llvm/trunk/test/CodeGen/X86/vector-shift-lshr-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shift-lshr-256.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shift-lshr-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shift-lshr-256.ll Tue Nov 28 09:15:09 2017
@@ -272,10 +272,10 @@ define <16 x i16> @var_shift_v16i16(<16
;
; AVX512BW-LABEL: var_shift_v16i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512DQVL-LABEL: var_shift_v16i16:
@@ -1091,10 +1091,10 @@ define <16 x i16> @constant_shift_v16i16
;
; AVX512BW-LABEL: constant_shift_v16i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512DQVL-LABEL: constant_shift_v16i16:
Modified: llvm/trunk/test/CodeGen/X86/vector-shift-shl-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shift-shl-128.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shift-shl-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shift-shl-128.ll Tue Nov 28 09:15:09 2017
@@ -247,7 +247,7 @@ define <8 x i16> @var_shift_v8i16(<8 x i
; AVX2-NEXT: vpsllvd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -262,16 +262,16 @@ define <8 x i16> @var_shift_v8i16(<8 x i
; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512DQ-NEXT: vpsllvd %ymm1, %ymm0, %ymm0
; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512BW-LABEL: var_shift_v8i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -902,10 +902,10 @@ define <8 x i16> @constant_shift_v8i16(<
;
; AVX512BW-LABEL: constant_shift_v8i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7]
; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
Modified: llvm/trunk/test/CodeGen/X86/vector-shift-shl-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shift-shl-256.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shift-shl-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shift-shl-256.ll Tue Nov 28 09:15:09 2017
@@ -232,10 +232,10 @@ define <16 x i16> @var_shift_v16i16(<16
;
; AVX512BW-LABEL: var_shift_v16i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512DQVL-LABEL: var_shift_v16i16:
@@ -966,10 +966,10 @@ define <16 x i16> @constant_shift_v16i16
;
; AVX512BW-LABEL: constant_shift_v16i16:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512BW-NEXT: retq
;
; AVX512DQVL-LABEL: constant_shift_v16i16:
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll Tue Nov 28 09:15:09 2017
@@ -1295,21 +1295,21 @@ define <4 x i64> @insert_mem_and_zero_v4
define <4 x double> @insert_reg_and_zero_v4f64(double %a) {
; AVX1-LABEL: insert_reg_and_zero_v4f64:
; AVX1: # BB#0:
-; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX1-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX1-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; AVX1-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]
; AVX1-NEXT: retq
;
; AVX2-LABEL: insert_reg_and_zero_v4f64:
; AVX2: # BB#0:
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX2-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: insert_reg_and_zero_v4f64:
; AVX512VL: # BB#0:
-; AVX512VL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512VL-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512VL-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; AVX512VL-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v16.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v16.ll Tue Nov 28 09:15:09 2017
@@ -689,7 +689,7 @@ define <16 x i32> @mask_shuffle_v16i32_0
define <16 x i32> @mask_shuffle_v4i32_v16i32_00_01_02_03_00_01_02_03_00_01_02_03_00_01_02_03(<4 x i32> %a) {
; ALL-LABEL: mask_shuffle_v4i32_v16i32_00_01_02_03_00_01_02_03_00_01_02_03_00_01_02_03:
; ALL: # BB#0:
-; ALL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; ALL-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; ALL-NEXT: retq
@@ -700,7 +700,7 @@ define <16 x i32> @mask_shuffle_v4i32_v1
define <16 x float> @mask_shuffle_v4f32_v16f32_00_01_02_03_00_01_02_03_00_01_02_03_00_01_02_03(<4 x float> %a) {
; ALL-LABEL: mask_shuffle_v4f32_v16f32_00_01_02_03_00_01_02_03_00_01_02_03_00_01_02_03:
; ALL: # BB#0:
-; ALL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; ALL-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; ALL-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v8.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v8.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v8.ll Tue Nov 28 09:15:09 2017
@@ -2644,14 +2644,14 @@ define <8 x double> @shuffle_v4f64_v8f64
define <8 x i64> @shuffle_v2i64_v8i64_01010101(<2 x i64> %a) {
; AVX512F-LABEL: shuffle_v2i64_v8i64_01010101:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; AVX512F-NEXT: retq
;
; AVX512F-32-LABEL: shuffle_v2i64_v8i64_01010101:
; AVX512F-32: # BB#0:
-; AVX512F-32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512F-32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512F-32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; AVX512F-32-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; AVX512F-32-NEXT: retl
@@ -2662,14 +2662,14 @@ define <8 x i64> @shuffle_v2i64_v8i64_01
define <8 x double> @shuffle_v2f64_v8f64_01010101(<2 x double> %a) {
; AVX512F-LABEL: shuffle_v2f64_v8f64_01010101:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; AVX512F-NEXT: retq
;
; AVX512F-32-LABEL: shuffle_v2f64_v8f64_01010101:
; AVX512F-32: # BB#0:
-; AVX512F-32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512F-32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX512F-32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; AVX512F-32-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; AVX512F-32-NEXT: retl
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-avx512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-avx512.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-avx512.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-avx512.ll Tue Nov 28 09:15:09 2017
@@ -8,7 +8,7 @@
define <8 x float> @expand(<4 x float> %a) {
; SKX64-LABEL: expand:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX64-NEXT: movb $5, %al
; SKX64-NEXT: kmovd %eax, %k1
; SKX64-NEXT: vexpandps %ymm0, %ymm0 {%k1} {z}
@@ -23,7 +23,7 @@ define <8 x float> @expand(<4 x float> %
;
; SKX32-LABEL: expand:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX32-NEXT: movb $5, %al
; SKX32-NEXT: kmovd %eax, %k1
; SKX32-NEXT: vexpandps %ymm0, %ymm0 {%k1} {z}
@@ -42,7 +42,7 @@ define <8 x float> @expand(<4 x float> %
define <8 x float> @expand1(<4 x float> %a ) {
; SKX64-LABEL: expand1:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX64-NEXT: movb $-86, %al
; SKX64-NEXT: kmovd %eax, %k1
; SKX64-NEXT: vexpandps %ymm0, %ymm0 {%k1} {z}
@@ -50,7 +50,7 @@ define <8 x float> @expand1(<4 x float>
;
; KNL64-LABEL: expand1:
; KNL64: # BB#0:
-; KNL64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL64-NEXT: vmovaps {{.*#+}} ymm1 = <u,0,u,1,u,2,u,3>
; KNL64-NEXT: vpermps %ymm0, %ymm1, %ymm0
; KNL64-NEXT: vxorps %xmm1, %xmm1, %xmm1
@@ -59,7 +59,7 @@ define <8 x float> @expand1(<4 x float>
;
; SKX32-LABEL: expand1:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX32-NEXT: movb $-86, %al
; SKX32-NEXT: kmovd %eax, %k1
; SKX32-NEXT: vexpandps %ymm0, %ymm0 {%k1} {z}
@@ -67,7 +67,7 @@ define <8 x float> @expand1(<4 x float>
;
; KNL32-LABEL: expand1:
; KNL32: # BB#0:
-; KNL32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL32-NEXT: vmovaps {{.*#+}} ymm1 = <u,0,u,1,u,2,u,3>
; KNL32-NEXT: vpermps %ymm0, %ymm1, %ymm0
; KNL32-NEXT: vxorps %xmm1, %xmm1, %xmm1
@@ -81,7 +81,7 @@ define <8 x float> @expand1(<4 x float>
define <4 x double> @expand2(<2 x double> %a) {
; SKX64-LABEL: expand2:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX64-NEXT: movb $9, %al
; SKX64-NEXT: kmovd %eax, %k1
; SKX64-NEXT: vexpandpd %ymm0, %ymm0 {%k1} {z}
@@ -89,7 +89,7 @@ define <4 x double> @expand2(<2 x double
;
; KNL64-LABEL: expand2:
; KNL64: # BB#0:
-; KNL64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL64-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,2,1]
; KNL64-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; KNL64-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3]
@@ -97,7 +97,7 @@ define <4 x double> @expand2(<2 x double
;
; SKX32-LABEL: expand2:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX32-NEXT: movb $9, %al
; SKX32-NEXT: kmovd %eax, %k1
; SKX32-NEXT: vexpandpd %ymm0, %ymm0 {%k1} {z}
@@ -105,7 +105,7 @@ define <4 x double> @expand2(<2 x double
;
; KNL32-LABEL: expand2:
; KNL32: # BB#0:
-; KNL32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL32-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,2,1]
; KNL32-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; KNL32-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3]
@@ -118,7 +118,7 @@ define <4 x double> @expand2(<2 x double
define <8 x i32> @expand3(<4 x i32> %a ) {
; SKX64-LABEL: expand3:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX64-NEXT: movb $-127, %al
; SKX64-NEXT: kmovd %eax, %k1
; SKX64-NEXT: vpexpandd %ymm0, %ymm0 {%k1} {z}
@@ -133,7 +133,7 @@ define <8 x i32> @expand3(<4 x i32> %a )
;
; SKX32-LABEL: expand3:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX32-NEXT: movb $-127, %al
; SKX32-NEXT: kmovd %eax, %k1
; SKX32-NEXT: vpexpandd %ymm0, %ymm0 {%k1} {z}
@@ -153,7 +153,7 @@ define <8 x i32> @expand3(<4 x i32> %a )
define <4 x i64> @expand4(<2 x i64> %a ) {
; SKX64-LABEL: expand4:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX64-NEXT: movb $9, %al
; SKX64-NEXT: kmovd %eax, %k1
; SKX64-NEXT: vpexpandq %ymm0, %ymm0 {%k1} {z}
@@ -161,7 +161,7 @@ define <4 x i64> @expand4(<2 x i64> %a )
;
; KNL64-LABEL: expand4:
; KNL64: # BB#0:
-; KNL64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL64-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,2,1]
; KNL64-NEXT: vxorps %xmm1, %xmm1, %xmm1
; KNL64-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3,4,5],ymm0[6,7]
@@ -169,7 +169,7 @@ define <4 x i64> @expand4(<2 x i64> %a )
;
; SKX32-LABEL: expand4:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX32-NEXT: movb $9, %al
; SKX32-NEXT: kmovd %eax, %k1
; SKX32-NEXT: vpexpandq %ymm0, %ymm0 {%k1} {z}
@@ -177,7 +177,7 @@ define <4 x i64> @expand4(<2 x i64> %a )
;
; KNL32-LABEL: expand4:
; KNL32: # BB#0:
-; KNL32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; KNL32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; KNL32-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,2,1]
; KNL32-NEXT: vxorps %xmm1, %xmm1, %xmm1
; KNL32-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3,4,5],ymm0[6,7]
@@ -251,7 +251,7 @@ define <8 x float> @expand6(<4 x float>
define <16 x float> @expand7(<8 x float> %a) {
; SKX64-LABEL: expand7:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX64-NEXT: movw $1285, %ax # imm = 0x505
; SKX64-NEXT: kmovd %eax, %k1
; SKX64-NEXT: vexpandps %zmm0, %zmm0 {%k1} {z}
@@ -259,7 +259,7 @@ define <16 x float> @expand7(<8 x float>
;
; KNL64-LABEL: expand7:
; KNL64: # BB#0:
-; KNL64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL64-NEXT: movw $1285, %ax # imm = 0x505
; KNL64-NEXT: kmovw %eax, %k1
; KNL64-NEXT: vexpandps %zmm0, %zmm0 {%k1} {z}
@@ -267,7 +267,7 @@ define <16 x float> @expand7(<8 x float>
;
; SKX32-LABEL: expand7:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX32-NEXT: movw $1285, %ax # imm = 0x505
; SKX32-NEXT: kmovd %eax, %k1
; SKX32-NEXT: vexpandps %zmm0, %zmm0 {%k1} {z}
@@ -275,7 +275,7 @@ define <16 x float> @expand7(<8 x float>
;
; KNL32-LABEL: expand7:
; KNL32: # BB#0:
-; KNL32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL32-NEXT: movw $1285, %ax # imm = 0x505
; KNL32-NEXT: kmovw %eax, %k1
; KNL32-NEXT: vexpandps %zmm0, %zmm0 {%k1} {z}
@@ -287,7 +287,7 @@ define <16 x float> @expand7(<8 x float>
define <16 x float> @expand8(<8 x float> %a ) {
; SKX64-LABEL: expand8:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX64-NEXT: movw $-21846, %ax # imm = 0xAAAA
; SKX64-NEXT: kmovd %eax, %k1
; SKX64-NEXT: vexpandps %zmm0, %zmm0 {%k1} {z}
@@ -295,7 +295,7 @@ define <16 x float> @expand8(<8 x float>
;
; KNL64-LABEL: expand8:
; KNL64: # BB#0:
-; KNL64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL64-NEXT: movw $-21846, %ax # imm = 0xAAAA
; KNL64-NEXT: kmovw %eax, %k1
; KNL64-NEXT: vexpandps %zmm0, %zmm0 {%k1} {z}
@@ -303,7 +303,7 @@ define <16 x float> @expand8(<8 x float>
;
; SKX32-LABEL: expand8:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX32-NEXT: movw $-21846, %ax # imm = 0xAAAA
; SKX32-NEXT: kmovd %eax, %k1
; SKX32-NEXT: vexpandps %zmm0, %zmm0 {%k1} {z}
@@ -311,7 +311,7 @@ define <16 x float> @expand8(<8 x float>
;
; KNL32-LABEL: expand8:
; KNL32: # BB#0:
-; KNL32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL32-NEXT: movw $-21846, %ax # imm = 0xAAAA
; KNL32-NEXT: kmovw %eax, %k1
; KNL32-NEXT: vexpandps %zmm0, %zmm0 {%k1} {z}
@@ -324,7 +324,7 @@ define <16 x float> @expand8(<8 x float>
define <8 x double> @expand9(<4 x double> %a) {
; SKX64-LABEL: expand9:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX64-NEXT: movb $-127, %al
; SKX64-NEXT: kmovd %eax, %k1
; SKX64-NEXT: vexpandpd %zmm0, %zmm0 {%k1} {z}
@@ -332,7 +332,7 @@ define <8 x double> @expand9(<4 x double
;
; KNL64-LABEL: expand9:
; KNL64: # BB#0:
-; KNL64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL64-NEXT: movb $-127, %al
; KNL64-NEXT: kmovw %eax, %k1
; KNL64-NEXT: vexpandpd %zmm0, %zmm0 {%k1} {z}
@@ -340,7 +340,7 @@ define <8 x double> @expand9(<4 x double
;
; SKX32-LABEL: expand9:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX32-NEXT: movb $-127, %al
; SKX32-NEXT: kmovd %eax, %k1
; SKX32-NEXT: vexpandpd %zmm0, %zmm0 {%k1} {z}
@@ -348,7 +348,7 @@ define <8 x double> @expand9(<4 x double
;
; KNL32-LABEL: expand9:
; KNL32: # BB#0:
-; KNL32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL32-NEXT: movb $-127, %al
; KNL32-NEXT: kmovw %eax, %k1
; KNL32-NEXT: vexpandpd %zmm0, %zmm0 {%k1} {z}
@@ -360,7 +360,7 @@ define <8 x double> @expand9(<4 x double
define <16 x i32> @expand10(<8 x i32> %a ) {
; SKX64-LABEL: expand10:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX64-NEXT: movw $-21846, %ax # imm = 0xAAAA
; SKX64-NEXT: kmovd %eax, %k1
; SKX64-NEXT: vpexpandd %zmm0, %zmm0 {%k1} {z}
@@ -368,7 +368,7 @@ define <16 x i32> @expand10(<8 x i32> %a
;
; KNL64-LABEL: expand10:
; KNL64: # BB#0:
-; KNL64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL64-NEXT: movw $-21846, %ax # imm = 0xAAAA
; KNL64-NEXT: kmovw %eax, %k1
; KNL64-NEXT: vpexpandd %zmm0, %zmm0 {%k1} {z}
@@ -376,7 +376,7 @@ define <16 x i32> @expand10(<8 x i32> %a
;
; SKX32-LABEL: expand10:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX32-NEXT: movw $-21846, %ax # imm = 0xAAAA
; SKX32-NEXT: kmovd %eax, %k1
; SKX32-NEXT: vpexpandd %zmm0, %zmm0 {%k1} {z}
@@ -384,7 +384,7 @@ define <16 x i32> @expand10(<8 x i32> %a
;
; KNL32-LABEL: expand10:
; KNL32: # BB#0:
-; KNL32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL32-NEXT: movw $-21846, %ax # imm = 0xAAAA
; KNL32-NEXT: kmovw %eax, %k1
; KNL32-NEXT: vpexpandd %zmm0, %zmm0 {%k1} {z}
@@ -396,7 +396,7 @@ define <16 x i32> @expand10(<8 x i32> %a
define <8 x i64> @expand11(<4 x i64> %a) {
; SKX64-LABEL: expand11:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX64-NEXT: movb $-127, %al
; SKX64-NEXT: kmovd %eax, %k1
; SKX64-NEXT: vpexpandq %zmm0, %zmm0 {%k1} {z}
@@ -404,7 +404,7 @@ define <8 x i64> @expand11(<4 x i64> %a)
;
; KNL64-LABEL: expand11:
; KNL64: # BB#0:
-; KNL64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL64-NEXT: movb $-127, %al
; KNL64-NEXT: kmovw %eax, %k1
; KNL64-NEXT: vpexpandq %zmm0, %zmm0 {%k1} {z}
@@ -412,7 +412,7 @@ define <8 x i64> @expand11(<4 x i64> %a)
;
; SKX32-LABEL: expand11:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX32-NEXT: movb $-127, %al
; SKX32-NEXT: kmovd %eax, %k1
; SKX32-NEXT: vpexpandq %zmm0, %zmm0 {%k1} {z}
@@ -420,7 +420,7 @@ define <8 x i64> @expand11(<4 x i64> %a)
;
; KNL32-LABEL: expand11:
; KNL32: # BB#0:
-; KNL32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL32-NEXT: movb $-127, %al
; KNL32-NEXT: kmovw %eax, %k1
; KNL32-NEXT: vpexpandq %zmm0, %zmm0 {%k1} {z}
@@ -433,7 +433,7 @@ define <8 x i64> @expand11(<4 x i64> %a)
define <16 x float> @expand12(<8 x float> %a) {
; SKX64-LABEL: expand12:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX64-NEXT: vmovaps {{.*#+}} zmm2 = [0,16,2,16,4,16,6,16,0,16,1,16,2,16,3,16]
; SKX64-NEXT: vxorps %xmm1, %xmm1, %xmm1
; SKX64-NEXT: vpermt2ps %zmm0, %zmm2, %zmm1
@@ -442,7 +442,7 @@ define <16 x float> @expand12(<8 x float
;
; KNL64-LABEL: expand12:
; KNL64: # BB#0:
-; KNL64-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL64-NEXT: vmovaps {{.*#+}} zmm2 = [0,16,2,16,4,16,6,16,0,16,1,16,2,16,3,16]
; KNL64-NEXT: vxorps %xmm1, %xmm1, %xmm1
; KNL64-NEXT: vpermt2ps %zmm0, %zmm2, %zmm1
@@ -451,7 +451,7 @@ define <16 x float> @expand12(<8 x float
;
; SKX32-LABEL: expand12:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; SKX32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; SKX32-NEXT: vmovaps {{.*#+}} zmm2 = [0,16,2,16,4,16,6,16,0,16,1,16,2,16,3,16]
; SKX32-NEXT: vxorps %xmm1, %xmm1, %xmm1
; SKX32-NEXT: vpermt2ps %zmm0, %zmm2, %zmm1
@@ -460,7 +460,7 @@ define <16 x float> @expand12(<8 x float
;
; KNL32-LABEL: expand12:
; KNL32: # BB#0:
-; KNL32-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; KNL32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; KNL32-NEXT: vmovaps {{.*#+}} zmm2 = [0,16,2,16,4,16,6,16,0,16,1,16,2,16,3,16]
; KNL32-NEXT: vxorps %xmm1, %xmm1, %xmm1
; KNL32-NEXT: vpermt2ps %zmm0, %zmm2, %zmm1
@@ -503,7 +503,7 @@ define <16 x float> @expand13(<8 x float
define <8 x float> @expand14(<4 x float> %a) {
; SKX64-LABEL: expand14:
; SKX64: # BB#0:
-; SKX64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX64-NEXT: movb $20, %al
; SKX64-NEXT: kmovd %eax, %k1
; SKX64-NEXT: vexpandps %ymm0, %ymm0 {%k1} {z}
@@ -520,7 +520,7 @@ define <8 x float> @expand14(<4 x float>
;
; SKX32-LABEL: expand14:
; SKX32: # BB#0:
-; SKX32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; SKX32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; SKX32-NEXT: movb $20, %al
; SKX32-NEXT: kmovd %eax, %k1
; SKX32-NEXT: vexpandps %ymm0, %ymm0 {%k1} {z}
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx2.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx2.ll Tue Nov 28 09:15:09 2017
@@ -196,13 +196,13 @@ define <16 x i8> @combine_pshufb_as_vpbr
define <32 x i8> @combine_pshufb_as_vpbroadcastb256(<2 x i64> %a) {
; X32-LABEL: combine_pshufb_as_vpbroadcastb256:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vpbroadcastb %xmm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: combine_pshufb_as_vpbroadcastb256:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vpbroadcastb %xmm0, %ymm0
; X64-NEXT: retq
%1 = shufflevector <2 x i64> %a, <2 x i64> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
@@ -231,13 +231,13 @@ define <16 x i8> @combine_pshufb_as_vpbr
define <32 x i8> @combine_pshufb_as_vpbroadcastw256(<2 x i64> %a) {
; X32-LABEL: combine_pshufb_as_vpbroadcastw256:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vpbroadcastw %xmm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: combine_pshufb_as_vpbroadcastw256:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vpbroadcastw %xmm0, %ymm0
; X64-NEXT: retq
%1 = shufflevector <2 x i64> %a, <2 x i64> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
@@ -269,14 +269,14 @@ define <16 x i8> @combine_pshufb_as_vpbr
define <8 x i32> @combine_permd_as_vpbroadcastd256(<4 x i32> %a) {
; X32-LABEL: combine_permd_as_vpbroadcastd256:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vpbroadcastd %xmm0, %ymm0
; X32-NEXT: vpaddd {{\.LCPI.*}}, %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: combine_permd_as_vpbroadcastd256:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vpbroadcastd %xmm0, %ymm0
; X64-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: retq
@@ -303,14 +303,14 @@ define <16 x i8> @combine_pshufb_as_vpbr
define <8 x i32> @combine_permd_as_vpbroadcastq256(<4 x i32> %a) {
; X32-LABEL: combine_permd_as_vpbroadcastq256:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vpbroadcastq %xmm0, %ymm0
; X32-NEXT: vpaddd {{\.LCPI.*}}, %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: combine_permd_as_vpbroadcastq256:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vpbroadcastq %xmm0, %ymm0
; X64-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: retq
@@ -339,13 +339,13 @@ define <4 x float> @combine_pshufb_as_vp
define <8 x float> @combine_permps_as_vpbroadcastss256(<4 x float> %a) {
; X32-LABEL: combine_permps_as_vpbroadcastss256:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vbroadcastss %xmm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: combine_permps_as_vpbroadcastss256:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vbroadcastss %xmm0, %ymm0
; X64-NEXT: retq
%1 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
@@ -356,13 +356,13 @@ define <8 x float> @combine_permps_as_vp
define <4 x double> @combine_permps_as_vpbroadcastsd256(<2 x double> %a) {
; X32-LABEL: combine_permps_as_vpbroadcastsd256:
; X32: # BB#0:
-; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X32-NEXT: vbroadcastsd %xmm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: combine_permps_as_vpbroadcastsd256:
; X64: # BB#0:
-; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; X64-NEXT: vbroadcastsd %xmm0, %ymm0
; X64-NEXT: retq
%1 = shufflevector <2 x double> %a, <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-v1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-v1.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-v1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-v1.ll Tue Nov 28 09:15:09 2017
@@ -285,7 +285,7 @@ define i8 @shuf8i1_10_2_9_u_3_u_2_u(i8 %
; AVX512F-NEXT: vpsllq $63, %zmm2, %zmm0
; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
-; AVX512F-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512F-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -299,7 +299,7 @@ define i8 @shuf8i1_10_2_9_u_3_u_2_u(i8 %
; AVX512VL-NEXT: vpsllq $63, %zmm2, %zmm0
; AVX512VL-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512VL-NEXT: kmovw %k0, %eax
-; AVX512VL-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512VL-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq
;
@@ -312,7 +312,7 @@ define i8 @shuf8i1_10_2_9_u_3_u_2_u(i8 %
; VL_BW_DQ-NEXT: vpermi2q %zmm1, %zmm0, %zmm2
; VL_BW_DQ-NEXT: vpmovq2m %zmm2, %k0
; VL_BW_DQ-NEXT: kmovd %k0, %eax
-; VL_BW_DQ-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; VL_BW_DQ-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VL_BW_DQ-NEXT: vzeroupper
; VL_BW_DQ-NEXT: retq
%b = bitcast i8 %a to <8 x i1>
@@ -330,7 +330,7 @@ define i8 @shuf8i1_0_1_4_5_u_u_u_u(i8 %a
; AVX512F-NEXT: vpsllq $63, %zmm0, %zmm0
; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
-; AVX512F-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512F-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -342,7 +342,7 @@ define i8 @shuf8i1_0_1_4_5_u_u_u_u(i8 %a
; AVX512VL-NEXT: vpsllq $63, %zmm0, %zmm0
; AVX512VL-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512VL-NEXT: kmovw %k0, %eax
-; AVX512VL-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512VL-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq
;
@@ -353,7 +353,7 @@ define i8 @shuf8i1_0_1_4_5_u_u_u_u(i8 %a
; VL_BW_DQ-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm0[0,1,4,5,0,1,0,1]
; VL_BW_DQ-NEXT: vpmovq2m %zmm0, %k0
; VL_BW_DQ-NEXT: kmovd %k0, %eax
-; VL_BW_DQ-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; VL_BW_DQ-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VL_BW_DQ-NEXT: vzeroupper
; VL_BW_DQ-NEXT: retq
%b = bitcast i8 %a to <8 x i1>
@@ -373,7 +373,7 @@ define i8 @shuf8i1_9_6_1_0_3_7_7_0(i8 %a
; AVX512F-NEXT: vpsllq $63, %zmm2, %zmm0
; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
-; AVX512F-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512F-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -387,7 +387,7 @@ define i8 @shuf8i1_9_6_1_0_3_7_7_0(i8 %a
; AVX512VL-NEXT: vpsllq $63, %zmm2, %zmm0
; AVX512VL-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512VL-NEXT: kmovw %k0, %eax
-; AVX512VL-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512VL-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq
;
@@ -400,7 +400,7 @@ define i8 @shuf8i1_9_6_1_0_3_7_7_0(i8 %a
; VL_BW_DQ-NEXT: vpermi2q %zmm1, %zmm0, %zmm2
; VL_BW_DQ-NEXT: vpmovq2m %zmm2, %k0
; VL_BW_DQ-NEXT: kmovd %k0, %eax
-; VL_BW_DQ-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; VL_BW_DQ-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VL_BW_DQ-NEXT: vzeroupper
; VL_BW_DQ-NEXT: retq
%b = bitcast i8 %a to <8 x i1>
@@ -420,7 +420,7 @@ define i8 @shuf8i1_9_6_1_10_3_7_7_0(i8 %
; AVX512F-NEXT: vpsllq $63, %zmm2, %zmm0
; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
-; AVX512F-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512F-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -434,7 +434,7 @@ define i8 @shuf8i1_9_6_1_10_3_7_7_0(i8 %
; AVX512VL-NEXT: vpsllq $63, %zmm2, %zmm0
; AVX512VL-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512VL-NEXT: kmovw %k0, %eax
-; AVX512VL-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512VL-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq
;
@@ -447,7 +447,7 @@ define i8 @shuf8i1_9_6_1_10_3_7_7_0(i8 %
; VL_BW_DQ-NEXT: vpermt2q %zmm0, %zmm1, %zmm2
; VL_BW_DQ-NEXT: vpmovq2m %zmm2, %k0
; VL_BW_DQ-NEXT: kmovd %k0, %eax
-; VL_BW_DQ-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; VL_BW_DQ-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VL_BW_DQ-NEXT: vzeroupper
; VL_BW_DQ-NEXT: retq
%b = bitcast i8 %a to <8 x i1>
@@ -469,7 +469,7 @@ define i8 @shuf8i1__9_6_1_10_3_7_7_1(i8
; AVX512F-NEXT: vpsllq $63, %zmm2, %zmm0
; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
-; AVX512F-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512F-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -485,7 +485,7 @@ define i8 @shuf8i1__9_6_1_10_3_7_7_1(i8
; AVX512VL-NEXT: vpsllq $63, %zmm2, %zmm0
; AVX512VL-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512VL-NEXT: kmovw %k0, %eax
-; AVX512VL-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512VL-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq
;
@@ -498,7 +498,7 @@ define i8 @shuf8i1__9_6_1_10_3_7_7_1(i8
; VL_BW_DQ-NEXT: vpermt2q %zmm0, %zmm1, %zmm2
; VL_BW_DQ-NEXT: vpmovq2m %zmm2, %k0
; VL_BW_DQ-NEXT: kmovd %k0, %eax
-; VL_BW_DQ-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; VL_BW_DQ-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VL_BW_DQ-NEXT: vzeroupper
; VL_BW_DQ-NEXT: retq
%b = bitcast i8 %a to <8 x i1>
@@ -520,7 +520,7 @@ define i8 @shuf8i1_9_6_1_10_3_7_7_0_all_
; AVX512F-NEXT: vpsllq $63, %zmm2, %zmm0
; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
-; AVX512F-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512F-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -536,7 +536,7 @@ define i8 @shuf8i1_9_6_1_10_3_7_7_0_all_
; AVX512VL-NEXT: vpsllq $63, %zmm2, %zmm0
; AVX512VL-NEXT: vptestmq %zmm0, %zmm0, %k0
; AVX512VL-NEXT: kmovw %k0, %eax
-; AVX512VL-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512VL-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq
;
@@ -550,7 +550,7 @@ define i8 @shuf8i1_9_6_1_10_3_7_7_0_all_
; VL_BW_DQ-NEXT: vpermt2q %zmm0, %zmm1, %zmm2
; VL_BW_DQ-NEXT: vpmovq2m %zmm2, %k0
; VL_BW_DQ-NEXT: kmovd %k0, %eax
-; VL_BW_DQ-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; VL_BW_DQ-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VL_BW_DQ-NEXT: vzeroupper
; VL_BW_DQ-NEXT: retq
%c = shufflevector <8 x i1> <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>, <8 x i1> %a, <8 x i32> <i32 9, i32 6, i32 1, i32 0, i32 3, i32 7, i32 7, i32 0>
@@ -568,7 +568,7 @@ define i16 @shuf16i1_0_0_0_0_0_0_0_0_0_0
; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
-; AVX512F-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512F-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -580,7 +580,7 @@ define i16 @shuf16i1_0_0_0_0_0_0_0_0_0_0
; AVX512VL-NEXT: vpslld $31, %zmm0, %zmm0
; AVX512VL-NEXT: vptestmd %zmm0, %zmm0, %k0
; AVX512VL-NEXT: kmovw %k0, %eax
-; AVX512VL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512VL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq
;
@@ -591,7 +591,7 @@ define i16 @shuf16i1_0_0_0_0_0_0_0_0_0_0
; VL_BW_DQ-NEXT: vpbroadcastd %xmm0, %zmm0
; VL_BW_DQ-NEXT: vpmovd2m %zmm0, %k0
; VL_BW_DQ-NEXT: kmovd %k0, %eax
-; VL_BW_DQ-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; VL_BW_DQ-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VL_BW_DQ-NEXT: vzeroupper
; VL_BW_DQ-NEXT: retq
%b = bitcast i16 %a to <16 x i1>
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-variable-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-variable-128.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-variable-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-variable-128.ll Tue Nov 28 09:15:09 2017
@@ -37,8 +37,8 @@ define <2 x double> @var_shuffle_v2f64_v
define <2 x i64> @var_shuffle_v2i64_v2i64_xx_i64(<2 x i64> %x, i32 %i0, i32 %i1) nounwind {
; SSE-LABEL: var_shuffle_v2i64_v2i64_xx_i64:
; SSE: # BB#0:
-; SSE-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSE-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSE-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE-NEXT: andl $1, %edi
; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSE-NEXT: andl $1, %esi
@@ -49,8 +49,8 @@ define <2 x i64> @var_shuffle_v2i64_v2i6
;
; AVX-LABEL: var_shuffle_v2i64_v2i64_xx_i64:
; AVX: # BB#0:
-; AVX-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; AVX-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX-NEXT: andl $1, %edi
; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; AVX-NEXT: andl $1, %esi
@@ -68,10 +68,10 @@ define <2 x i64> @var_shuffle_v2i64_v2i6
define <4 x float> @var_shuffle_v4f32_v4f32_xxxx_i32(<4 x float> %x, i32 %i0, i32 %i1, i32 %i2, i32 %i3) nounwind {
; SSE2-LABEL: var_shuffle_v4f32_v4f32_xxxx_i32:
; SSE2: # BB#0:
-; SSE2-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSE2-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSE2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSE2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSE2-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSE2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSE2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-NEXT: andl $3, %edi
; SSE2-NEXT: andl $3, %esi
; SSE2-NEXT: andl $3, %edx
@@ -88,10 +88,10 @@ define <4 x float> @var_shuffle_v4f32_v4
;
; SSSE3-LABEL: var_shuffle_v4f32_v4f32_xxxx_i32:
; SSSE3: # BB#0:
-; SSSE3-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSSE3-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSSE3-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSSE3-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSSE3-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSSE3-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSSE3-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSSE3-NEXT: andl $3, %edi
; SSSE3-NEXT: andl $3, %esi
; SSSE3-NEXT: andl $3, %edx
@@ -108,10 +108,10 @@ define <4 x float> @var_shuffle_v4f32_v4
;
; SSE41-LABEL: var_shuffle_v4f32_v4f32_xxxx_i32:
; SSE41: # BB#0:
-; SSE41-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSE41-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSE41-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSE41-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE41-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSE41-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSE41-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSE41-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE41-NEXT: andl $3, %edi
; SSE41-NEXT: andl $3, %esi
; SSE41-NEXT: andl $3, %edx
@@ -125,10 +125,10 @@ define <4 x float> @var_shuffle_v4f32_v4
;
; AVX-LABEL: var_shuffle_v4f32_v4f32_xxxx_i32:
; AVX: # BB#0:
-; AVX-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; AVX-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; AVX-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; AVX-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; AVX-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; AVX-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX-NEXT: andl $3, %edi
; AVX-NEXT: andl $3, %esi
; AVX-NEXT: andl $3, %edx
@@ -153,10 +153,10 @@ define <4 x float> @var_shuffle_v4f32_v4
define <4 x i32> @var_shuffle_v4i32_v4i32_xxxx_i32(<4 x i32> %x, i32 %i0, i32 %i1, i32 %i2, i32 %i3) nounwind {
; SSE2-LABEL: var_shuffle_v4i32_v4i32_xxxx_i32:
; SSE2: # BB#0:
-; SSE2-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSE2-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSE2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSE2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSE2-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSE2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSE2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-NEXT: andl $3, %edi
; SSE2-NEXT: andl $3, %esi
; SSE2-NEXT: andl $3, %edx
@@ -173,10 +173,10 @@ define <4 x i32> @var_shuffle_v4i32_v4i3
;
; SSSE3-LABEL: var_shuffle_v4i32_v4i32_xxxx_i32:
; SSSE3: # BB#0:
-; SSSE3-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSSE3-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSSE3-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSSE3-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSSE3-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSSE3-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSSE3-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSSE3-NEXT: andl $3, %edi
; SSSE3-NEXT: andl $3, %esi
; SSSE3-NEXT: andl $3, %edx
@@ -193,10 +193,10 @@ define <4 x i32> @var_shuffle_v4i32_v4i3
;
; SSE41-LABEL: var_shuffle_v4i32_v4i32_xxxx_i32:
; SSE41: # BB#0:
-; SSE41-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSE41-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSE41-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSE41-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE41-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSE41-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSE41-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSE41-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE41-NEXT: andl $3, %edi
; SSE41-NEXT: andl $3, %esi
; SSE41-NEXT: andl $3, %edx
@@ -210,10 +210,10 @@ define <4 x i32> @var_shuffle_v4i32_v4i3
;
; AVX-LABEL: var_shuffle_v4i32_v4i32_xxxx_i32:
; AVX: # BB#0:
-; AVX-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; AVX-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; AVX-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; AVX-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; AVX-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; AVX-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX-NEXT: andl $3, %edi
; AVX-NEXT: andl $3, %esi
; AVX-NEXT: andl $3, %edx
@@ -238,12 +238,12 @@ define <4 x i32> @var_shuffle_v4i32_v4i3
define <8 x i16> @var_shuffle_v8i16_v8i16_xxxxxxxx_i16(<8 x i16> %x, i16 %i0, i16 %i1, i16 %i2, i16 %i3, i16 %i4, i16 %i5, i16 %i6, i16 %i7) nounwind {
; SSE2-LABEL: var_shuffle_v8i16_v8i16_xxxxxxxx_i16:
; SSE2: # BB#0:
-; SSE2-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; SSE2-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; SSE2-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSE2-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSE2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSE2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE2-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; SSE2-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; SSE2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSE2-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSE2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSE2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-NEXT: andl $7, %edi
; SSE2-NEXT: andl $7, %esi
; SSE2-NEXT: andl $7, %edx
@@ -282,12 +282,12 @@ define <8 x i16> @var_shuffle_v8i16_v8i1
;
; SSSE3-LABEL: var_shuffle_v8i16_v8i16_xxxxxxxx_i16:
; SSSE3: # BB#0:
-; SSSE3-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; SSSE3-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; SSSE3-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSSE3-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSSE3-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSSE3-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSSE3-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; SSSE3-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; SSSE3-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSSE3-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSSE3-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSSE3-NEXT: andl $7, %edi
; SSSE3-NEXT: andl $7, %esi
; SSSE3-NEXT: andl $7, %edx
@@ -326,12 +326,12 @@ define <8 x i16> @var_shuffle_v8i16_v8i1
;
; SSE41-LABEL: var_shuffle_v8i16_v8i16_xxxxxxxx_i16:
; SSE41: # BB#0:
-; SSE41-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; SSE41-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; SSE41-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSE41-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSE41-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSE41-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE41-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; SSE41-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; SSE41-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSE41-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSE41-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSE41-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE41-NEXT: andl $7, %edi
; SSE41-NEXT: andl $7, %esi
; SSE41-NEXT: andl $7, %edx
@@ -356,12 +356,12 @@ define <8 x i16> @var_shuffle_v8i16_v8i1
;
; AVX-LABEL: var_shuffle_v8i16_v8i16_xxxxxxxx_i16:
; AVX: # BB#0:
-; AVX-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; AVX-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; AVX-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; AVX-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; AVX-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; AVX-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; AVX-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; AVX-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; AVX-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX-NEXT: andl $7, %edi
; AVX-NEXT: andl $7, %esi
; AVX-NEXT: andl $7, %edx
@@ -405,12 +405,12 @@ define <8 x i16> @var_shuffle_v8i16_v8i1
define <16 x i8> @var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8(<16 x i8> %x, i8 %i0, i8 %i1, i8 %i2, i8 %i3, i8 %i4, i8 %i5, i8 %i6, i8 %i7, i8 %i8, i8 %i9, i8 %i10, i8 %i11, i8 %i12, i8 %i13, i8 %i14, i8 %i15) nounwind {
; SSE2-LABEL: var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
; SSE2: # BB#0:
-; SSE2-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; SSE2-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; SSE2-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSE2-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSE2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSE2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE2-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; SSE2-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; SSE2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSE2-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSE2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSE2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSE2-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; SSE2-NEXT: andl $15, %eax
@@ -490,12 +490,12 @@ define <16 x i8> @var_shuffle_v16i8_v16i
;
; SSSE3-LABEL: var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
; SSSE3: # BB#0:
-; SSSE3-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; SSSE3-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; SSSE3-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSSE3-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSSE3-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSSE3-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSSE3-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; SSSE3-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; SSSE3-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSSE3-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSSE3-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSSE3-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSSE3-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; SSSE3-NEXT: andl $15, %eax
@@ -575,12 +575,12 @@ define <16 x i8> @var_shuffle_v16i8_v16i
;
; SSE41-LABEL: var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
; SSE41: # BB#0:
-; SSE41-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; SSE41-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; SSE41-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSE41-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSE41-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSE41-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE41-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; SSE41-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; SSE41-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSE41-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSE41-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSE41-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE41-NEXT: andl $15, %edi
; SSE41-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSE41-NEXT: leaq -{{[0-9]+}}(%rsp), %rax
@@ -630,12 +630,12 @@ define <16 x i8> @var_shuffle_v16i8_v16i
;
; AVX-LABEL: var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
; AVX: # BB#0:
-; AVX-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; AVX-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; AVX-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; AVX-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; AVX-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; AVX-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; AVX-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; AVX-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; AVX-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX-NEXT: andl $15, %edi
; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; AVX-NEXT: leaq -{{[0-9]+}}(%rsp), %rax
@@ -1168,9 +1168,9 @@ define <16 x i8> @mem_shuffle_v16i8_v16i
define <4 x float> @var_shuffle_v4f32_v4f32_x0yx_i32(<4 x float> %x, <4 x float> %y, i32 %i0, i32 %i1, i32 %i2, i32 %i3) nounwind {
; SSE-LABEL: var_shuffle_v4f32_v4f32_x0yx_i32:
; SSE: # BB#0:
-; SSE-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSE-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSE-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSE-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSE-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE-NEXT: andl $3, %edi
; SSE-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
; SSE-NEXT: andl $3, %edx
@@ -1185,9 +1185,9 @@ define <4 x float> @var_shuffle_v4f32_v4
;
; AVX-LABEL: var_shuffle_v4f32_v4f32_x0yx_i32:
; AVX: # BB#0:
-; AVX-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; AVX-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; AVX-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; AVX-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX-NEXT: andl $3, %edi
; AVX-NEXT: vmovaps %xmm1, -{{[0-9]+}}(%rsp)
; AVX-NEXT: andl $3, %edx
@@ -1213,12 +1213,12 @@ define <4 x float> @var_shuffle_v4f32_v4
define <8 x i16> @var_shuffle_v8i16_v8i16_xyxyxy00_i16(<8 x i16> %x, <8 x i16> %y, i16 %i0, i16 %i1, i16 %i2, i16 %i3, i16 %i4, i16 %i5, i16 %i6, i16 %i7) nounwind {
; SSE2-LABEL: var_shuffle_v8i16_v8i16_xyxyxy00_i16:
; SSE2: # BB#0:
-; SSE2-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; SSE2-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; SSE2-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSE2-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSE2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSE2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE2-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; SSE2-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; SSE2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSE2-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSE2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSE2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-NEXT: andl $7, %edi
; SSE2-NEXT: andl $7, %esi
; SSE2-NEXT: andl $7, %edx
@@ -1250,12 +1250,12 @@ define <8 x i16> @var_shuffle_v8i16_v8i1
;
; SSSE3-LABEL: var_shuffle_v8i16_v8i16_xyxyxy00_i16:
; SSSE3: # BB#0:
-; SSSE3-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; SSSE3-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; SSSE3-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSSE3-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSSE3-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSSE3-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSSE3-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; SSSE3-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; SSSE3-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSSE3-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSSE3-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSSE3-NEXT: andl $7, %edi
; SSSE3-NEXT: andl $7, %esi
; SSSE3-NEXT: andl $7, %edx
@@ -1287,12 +1287,12 @@ define <8 x i16> @var_shuffle_v8i16_v8i1
;
; SSE41-LABEL: var_shuffle_v8i16_v8i16_xyxyxy00_i16:
; SSE41: # BB#0:
-; SSE41-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; SSE41-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; SSE41-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; SSE41-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; SSE41-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; SSE41-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; SSE41-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; SSE41-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; SSE41-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; SSE41-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; SSE41-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; SSE41-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE41-NEXT: andl $7, %edi
; SSE41-NEXT: andl $7, %esi
; SSE41-NEXT: andl $7, %edx
@@ -1312,12 +1312,12 @@ define <8 x i16> @var_shuffle_v8i16_v8i1
;
; AVX-LABEL: var_shuffle_v8i16_v8i16_xyxyxy00_i16:
; AVX: # BB#0:
-; AVX-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; AVX-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; AVX-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; AVX-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; AVX-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; AVX-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; AVX-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; AVX-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; AVX-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX-NEXT: andl $7, %edi
; AVX-NEXT: andl $7, %esi
; AVX-NEXT: andl $7, %edx
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-variable-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-variable-256.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-variable-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-variable-256.ll Tue Nov 28 09:15:09 2017
@@ -185,12 +185,12 @@ define <8 x float> @var_shuffle_v8f32_v8
; ALL-NEXT: movq %rsp, %rbp
; ALL-NEXT: andq $-32, %rsp
; ALL-NEXT: subq $64, %rsp
-; ALL-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; ALL-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; ALL-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; ALL-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; ALL-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; ALL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; ALL-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; ALL-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; ALL-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; ALL-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; ALL-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; ALL-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; ALL-NEXT: andl $7, %edi
; ALL-NEXT: andl $7, %esi
; ALL-NEXT: andl $7, %edx
@@ -236,12 +236,12 @@ define <8 x float> @var_shuffle_v8f32_v8
define <8 x float> @var_shuffle_v8f32_v4f32_xxxxxxxx_i32(<4 x float> %x, i32 %i0, i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7) nounwind {
; ALL-LABEL: var_shuffle_v8f32_v4f32_xxxxxxxx_i32:
; ALL: # BB#0:
-; ALL-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; ALL-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; ALL-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; ALL-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; ALL-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; ALL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; ALL-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; ALL-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; ALL-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; ALL-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; ALL-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; ALL-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; ALL-NEXT: andl $3, %edi
; ALL-NEXT: andl $3, %esi
; ALL-NEXT: andl $3, %edx
@@ -289,12 +289,12 @@ define <16 x i16> @var_shuffle_v16i16_v1
; AVX1-NEXT: movq %rsp, %rbp
; AVX1-NEXT: andq $-32, %rsp
; AVX1-NEXT: subq $64, %rsp
-; AVX1-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; AVX1-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; AVX1-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; AVX1-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; AVX1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; AVX1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX1-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; AVX1-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; AVX1-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; AVX1-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; AVX1-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; AVX1-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX1-NEXT: andl $15, %edi
; AVX1-NEXT: vmovaps %ymm0, (%rsp)
; AVX1-NEXT: movzwl (%rsp,%rdi,2), %eax
@@ -351,12 +351,12 @@ define <16 x i16> @var_shuffle_v16i16_v1
; AVX2-NEXT: movq %rsp, %rbp
; AVX2-NEXT: andq $-32, %rsp
; AVX2-NEXT: subq $64, %rsp
-; AVX2-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; AVX2-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; AVX2-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; AVX2-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; AVX2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; AVX2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX2-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; AVX2-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; AVX2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; AVX2-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; AVX2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; AVX2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX2-NEXT: andl $15, %edi
; AVX2-NEXT: vmovaps %ymm0, (%rsp)
; AVX2-NEXT: movzwl (%rsp,%rdi,2), %eax
@@ -444,12 +444,12 @@ define <16 x i16> @var_shuffle_v16i16_v1
define <16 x i16> @var_shuffle_v16i16_v8i16_xxxxxxxxxxxxxxxx_i16(<8 x i16> %x, i32 %i0, i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, i32 %i11, i32 %i12, i32 %i13, i32 %i14, i32 %i15) nounwind {
; AVX1-LABEL: var_shuffle_v16i16_v8i16_xxxxxxxxxxxxxxxx_i16:
; AVX1: # BB#0:
-; AVX1-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; AVX1-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; AVX1-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; AVX1-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; AVX1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; AVX1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX1-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; AVX1-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; AVX1-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; AVX1-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; AVX1-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; AVX1-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX1-NEXT: andl $7, %edi
; AVX1-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; AVX1-NEXT: movzwl -24(%rsp,%rdi,2), %eax
@@ -500,12 +500,12 @@ define <16 x i16> @var_shuffle_v16i16_v8
;
; AVX2-LABEL: var_shuffle_v16i16_v8i16_xxxxxxxxxxxxxxxx_i16:
; AVX2: # BB#0:
-; AVX2-NEXT: # kill: %R9D<def> %R9D<kill> %R9<def>
-; AVX2-NEXT: # kill: %R8D<def> %R8D<kill> %R8<def>
-; AVX2-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
-; AVX2-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
-; AVX2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
-; AVX2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; AVX2-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
+; AVX2-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
+; AVX2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
+; AVX2-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
+; AVX2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
+; AVX2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX2-NEXT: andl $7, %edi
; AVX2-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; AVX2-NEXT: movzwl -24(%rsp,%rdi,2), %eax
Modified: llvm/trunk/test/CodeGen/X86/vector-trunc-math.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-trunc-math.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-trunc-math.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-trunc-math.ll Tue Nov 28 09:15:09 2017
@@ -33,7 +33,7 @@ define <4 x i32> @trunc_add_v4i64_v4i32(
; AVX2-NEXT: vpaddq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -41,7 +41,7 @@ define <4 x i32> @trunc_add_v4i64_v4i32(
; AVX512: # BB#0:
; AVX512-NEXT: vpaddq %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = add <4 x i64> %a0, %a1
@@ -101,7 +101,7 @@ define <8 x i16> @trunc_add_v8i64_v8i16(
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -146,7 +146,7 @@ define <8 x i16> @trunc_add_v8i32_v8i16(
; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -154,7 +154,7 @@ define <8 x i16> @trunc_add_v8i32_v8i16(
; AVX512: # BB#0:
; AVX512-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = add <8 x i32> %a0, %a1
@@ -383,7 +383,7 @@ define <16 x i8> @trunc_add_v16i16_v16i8
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -435,7 +435,7 @@ define <8 x i16> @trunc_add_v8i32_v8i16_
;
; AVX512-LABEL: trunc_add_v8i32_v8i16_sext_8i8:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
+; AVX512-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; AVX512-NEXT: vpmovdw %zmm1, %ymm1
; AVX512-NEXT: vpmovsxbw %xmm0, %xmm0
; AVX512-NEXT: vpaddw %xmm1, %xmm0, %xmm0
@@ -477,7 +477,7 @@ define <4 x i32> @trunc_add_const_v4i64_
;
; AVX512-LABEL: trunc_add_const_v4i64_v4i32:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
; AVX512-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -576,7 +576,7 @@ define <8 x i16> @trunc_add_const_v8i32_
;
; AVX512-LABEL: trunc_add_const_v8i32_v8i16:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
; AVX512-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -771,7 +771,7 @@ define <16 x i8> @trunc_add_const_v16i16
;
; AVX512BW-LABEL: trunc_add_const_v16i16_v16i8:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; AVX512BW-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0
; AVX512BW-NEXT: vzeroupper
@@ -816,7 +816,7 @@ define <4 x i32> @trunc_sub_v4i64_v4i32(
; AVX2-NEXT: vpsubq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -824,7 +824,7 @@ define <4 x i32> @trunc_sub_v4i64_v4i32(
; AVX512: # BB#0:
; AVX512-NEXT: vpsubq %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = sub <4 x i64> %a0, %a1
@@ -884,7 +884,7 @@ define <8 x i16> @trunc_sub_v8i64_v8i16(
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -929,7 +929,7 @@ define <8 x i16> @trunc_sub_v8i32_v8i16(
; AVX2-NEXT: vpsubd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -937,7 +937,7 @@ define <8 x i16> @trunc_sub_v8i32_v8i16(
; AVX512: # BB#0:
; AVX512-NEXT: vpsubd %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = sub <8 x i32> %a0, %a1
@@ -1166,7 +1166,7 @@ define <16 x i8> @trunc_sub_v16i16_v16i8
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpsubw %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -1214,7 +1214,7 @@ define <4 x i32> @trunc_sub_const_v4i64_
; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0
; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -1222,7 +1222,7 @@ define <4 x i32> @trunc_sub_const_v4i64_
; AVX512: # BB#0:
; AVX512-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = sub <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3>
@@ -1287,7 +1287,7 @@ define <8 x i16> @trunc_sub_const_v8i64_
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -1331,7 +1331,7 @@ define <8 x i16> @trunc_sub_const_v8i32_
; AVX2-NEXT: vpsubd {{.*}}(%rip), %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -1339,7 +1339,7 @@ define <8 x i16> @trunc_sub_const_v8i32_
; AVX512: # BB#0:
; AVX512-NEXT: vpsubd {{.*}}(%rip), %ymm0, %ymm0
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = sub <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
@@ -1567,7 +1567,7 @@ define <16 x i8> @trunc_sub_const_v16i16
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -1635,8 +1635,8 @@ define <4 x i32> @trunc_mul_v4i64_v4i32(
;
; AVX512F-LABEL: trunc_mul_v4i64_v4i32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: vpmovqd %zmm1, %ymm1
; AVX512F-NEXT: vpmovqd %zmm0, %ymm0
; AVX512F-NEXT: vpmulld %xmm1, %xmm0, %xmm0
@@ -1645,8 +1645,8 @@ define <4 x i32> @trunc_mul_v4i64_v4i32(
;
; AVX512BW-LABEL: trunc_mul_v4i64_v4i32:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1
; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0
; AVX512BW-NEXT: vpmulld %xmm1, %xmm0, %xmm0
@@ -1655,11 +1655,11 @@ define <4 x i32> @trunc_mul_v4i64_v4i32(
;
; AVX512DQ-LABEL: trunc_mul_v4i64_v4i32:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512DQ-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512DQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512DQ-NEXT: vpmullq %zmm1, %zmm0, %zmm0
; AVX512DQ-NEXT: vpmovqd %zmm0, %ymm0
-; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512DQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
%1 = mul <4 x i64> %a0, %a1
@@ -1810,7 +1810,7 @@ define <8 x i16> @trunc_mul_v8i32_v8i16(
; AVX2-NEXT: vpmulld %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -1818,7 +1818,7 @@ define <8 x i16> @trunc_mul_v8i32_v8i16(
; AVX512: # BB#0:
; AVX512-NEXT: vpmulld %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = mul <8 x i32> %a0, %a1
@@ -2241,7 +2241,7 @@ define <16 x i8> @trunc_mul_v16i16_v16i8
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpmullw %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -2293,7 +2293,7 @@ define <8 x i16> @trunc_mul_v8i32_v8i16_
;
; AVX512-LABEL: trunc_mul_v8i32_v8i16_zext_8i8:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
+; AVX512-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; AVX512-NEXT: vpmovdw %zmm1, %ymm1
; AVX512-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512-NEXT: vpmullw %xmm1, %xmm0, %xmm0
@@ -2350,7 +2350,7 @@ define <4 x i32> @trunc_mul_const_v4i64_
;
; AVX512-LABEL: trunc_mul_const_v4i64_v4i32:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
; AVX512-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -2449,7 +2449,7 @@ define <8 x i16> @trunc_mul_const_v8i32_
;
; AVX512-LABEL: trunc_mul_const_v8i32_v8i16:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
; AVX512-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -2793,7 +2793,7 @@ define <16 x i8> @trunc_mul_const_v16i16
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -2834,7 +2834,7 @@ define <4 x i32> @trunc_and_v4i64_v4i32(
; AVX2-NEXT: vandps %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
; AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -2842,7 +2842,7 @@ define <4 x i32> @trunc_and_v4i64_v4i32(
; AVX512: # BB#0:
; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = and <4 x i64> %a0, %a1
@@ -2898,7 +2898,7 @@ define <8 x i16> @trunc_and_v8i64_v8i16(
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -2941,7 +2941,7 @@ define <8 x i16> @trunc_and_v8i32_v8i16(
; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -2949,7 +2949,7 @@ define <8 x i16> @trunc_and_v8i32_v8i16(
; AVX512: # BB#0:
; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = and <8 x i32> %a0, %a1
@@ -3164,7 +3164,7 @@ define <16 x i8> @trunc_and_v16i16_v16i8
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -3209,7 +3209,7 @@ define <4 x i32> @trunc_and_const_v4i64_
;
; AVX512-LABEL: trunc_and_const_v4i64_v4i32:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -3308,7 +3308,7 @@ define <8 x i16> @trunc_and_const_v8i32_
;
; AVX512-LABEL: trunc_and_const_v8i32_v8i16:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -3503,7 +3503,7 @@ define <16 x i8> @trunc_and_const_v16i16
;
; AVX512BW-LABEL: trunc_and_const_v16i16_v16i8:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; AVX512BW-NEXT: vzeroupper
@@ -3546,7 +3546,7 @@ define <4 x i32> @trunc_xor_v4i64_v4i32(
; AVX2-NEXT: vxorps %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
; AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -3554,7 +3554,7 @@ define <4 x i32> @trunc_xor_v4i64_v4i32(
; AVX512: # BB#0:
; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = xor <4 x i64> %a0, %a1
@@ -3610,7 +3610,7 @@ define <8 x i16> @trunc_xor_v8i64_v8i16(
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -3653,7 +3653,7 @@ define <8 x i16> @trunc_xor_v8i32_v8i16(
; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -3661,7 +3661,7 @@ define <8 x i16> @trunc_xor_v8i32_v8i16(
; AVX512: # BB#0:
; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = xor <8 x i32> %a0, %a1
@@ -3876,7 +3876,7 @@ define <16 x i8> @trunc_xor_v16i16_v16i8
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpxor %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -3921,7 +3921,7 @@ define <4 x i32> @trunc_xor_const_v4i64_
;
; AVX512-LABEL: trunc_xor_const_v4i64_v4i32:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
; AVX512-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -4020,7 +4020,7 @@ define <8 x i16> @trunc_xor_const_v8i32_
;
; AVX512-LABEL: trunc_xor_const_v8i32_v8i16:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
; AVX512-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -4215,7 +4215,7 @@ define <16 x i8> @trunc_xor_const_v16i16
;
; AVX512BW-LABEL: trunc_xor_const_v16i16_v16i8:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; AVX512BW-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0
; AVX512BW-NEXT: vzeroupper
@@ -4258,7 +4258,7 @@ define <4 x i32> @trunc_or_v4i64_v4i32(<
; AVX2-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
; AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -4266,7 +4266,7 @@ define <4 x i32> @trunc_or_v4i64_v4i32(<
; AVX512: # BB#0:
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = or <4 x i64> %a0, %a1
@@ -4322,7 +4322,7 @@ define <8 x i16> @trunc_or_v8i64_v8i16(<
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -4365,7 +4365,7 @@ define <8 x i16> @trunc_or_v8i32_v8i16(<
; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -4373,7 +4373,7 @@ define <8 x i16> @trunc_or_v8i32_v8i16(<
; AVX512: # BB#0:
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%1 = or <8 x i32> %a0, %a1
@@ -4588,7 +4588,7 @@ define <16 x i8> @trunc_or_v16i16_v16i8(
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpor %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -4633,7 +4633,7 @@ define <4 x i32> @trunc_or_const_v4i64_v
;
; AVX512-LABEL: trunc_or_const_v4i64_v4i32:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
; AVX512-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -4732,7 +4732,7 @@ define <8 x i16> @trunc_or_const_v8i32_v
;
; AVX512-LABEL: trunc_or_const_v8i32_v8i16:
; AVX512: # BB#0:
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512-NEXT: vpmovdw %zmm0, %ymm0
; AVX512-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -4927,7 +4927,7 @@ define <16 x i8> @trunc_or_const_v16i16_
;
; AVX512BW-LABEL: trunc_or_const_v16i16_v16i8:
; AVX512BW: # BB#0:
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; AVX512BW-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0
; AVX512BW-NEXT: vzeroupper
Modified: llvm/trunk/test/CodeGen/X86/vector-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-trunc.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-trunc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-trunc.ll Tue Nov 28 09:15:09 2017
@@ -237,7 +237,7 @@ define <8 x i16> @trunc8i64_8i16(<8 x i6
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -348,15 +348,15 @@ define <8 x i16> @trunc8i32_8i16(<8 x i3
; AVX2: # BB#0: # %entry
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
-; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512F-LABEL: trunc8i32_8i16:
; AVX512F: # BB#0: # %entry
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -368,9 +368,9 @@ define <8 x i16> @trunc8i32_8i16(<8 x i3
;
; AVX512BW-LABEL: trunc8i32_8i16:
; AVX512BW: # BB#0: # %entry
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -413,7 +413,7 @@ define <8 x i16> @trunc8i32_8i16_ashr(<8
; AVX512F: # BB#0: # %entry
; AVX512F-NEXT: vpsrad $16, %ymm0, %ymm0
; AVX512F-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -428,7 +428,7 @@ define <8 x i16> @trunc8i32_8i16_ashr(<8
; AVX512BW: # BB#0: # %entry
; AVX512BW-NEXT: vpsrad $16, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -492,7 +492,7 @@ define <8 x i16> @trunc8i32_8i16_lshr(<8
; AVX512F: # BB#0: # %entry
; AVX512F-NEXT: vpsrld $16, %ymm0, %ymm0
; AVX512F-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq
;
@@ -507,7 +507,7 @@ define <8 x i16> @trunc8i32_8i16_lshr(<8
; AVX512BW: # BB#0: # %entry
; AVX512BW-NEXT: vpsrld $16, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0
-; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
+; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill>
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
@@ -574,7 +574,7 @@ define void @trunc8i32_8i8(<8 x i32> %a)
;
; AVX512F-LABEL: trunc8i32_8i8:
; AVX512F: # BB#0: # %entry
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: vpmovdw %zmm0, %ymm0
; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; AVX512F-NEXT: vmovq %xmm0, (%rax)
@@ -589,7 +589,7 @@ define void @trunc8i32_8i8(<8 x i32> %a)
;
; AVX512BW-LABEL: trunc8i32_8i8:
; AVX512BW: # BB#0: # %entry
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0
; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; AVX512BW-NEXT: vmovq %xmm0, (%rax)
@@ -1089,7 +1089,7 @@ define void @trunc16i16_16i8(<16 x i16>
;
; AVX512BW-LABEL: trunc16i16_16i8:
; AVX512BW: # BB#0: # %entry
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; AVX512BW-NEXT: vmovdqu %xmm0, (%rax)
; AVX512BW-NEXT: vzeroupper
@@ -1379,8 +1379,8 @@ define <8 x i32> @trunc2x4i64_8i32(<4 x
;
; AVX512F-LABEL: trunc2x4i64_8i32:
; AVX512F: # BB#0: # %entry
-; AVX512F-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: vpmovqd %zmm0, %ymm0
; AVX512F-NEXT: vpmovqd %zmm1, %ymm1
; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
@@ -1395,8 +1395,8 @@ define <8 x i32> @trunc2x4i64_8i32(<4 x
;
; AVX512BW-LABEL: trunc2x4i64_8i32:
; AVX512BW: # BB#0: # %entry
-; AVX512BW-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0
; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1
; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
@@ -1489,8 +1489,8 @@ define <8 x i16> @trunc2x4i64_8i16(<4 x
;
; AVX512F-LABEL: trunc2x4i64_8i16:
; AVX512F: # BB#0: # %entry
-; AVX512F-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: vpmovqd %zmm0, %ymm0
; AVX512F-NEXT: vpmovqd %zmm1, %ymm1
; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
@@ -1516,8 +1516,8 @@ define <8 x i16> @trunc2x4i64_8i16(<4 x
;
; AVX512BW-LABEL: trunc2x4i64_8i16:
; AVX512BW: # BB#0: # %entry
-; AVX512BW-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512BW-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0
; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
Modified: llvm/trunk/test/CodeGen/X86/vector-tzcnt-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-tzcnt-128.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-tzcnt-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-tzcnt-128.ll Tue Nov 28 09:15:09 2017
@@ -133,7 +133,7 @@ define <2 x i64> @testv2i64(<2 x i64> %i
; AVX512VPOPCNTDQ-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; AVX512VPOPCNTDQ-NEXT: vpaddq %xmm1, %xmm0, %xmm0
; AVX512VPOPCNTDQ-NEXT: vpopcntq %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: vzeroupper
; AVX512VPOPCNTDQ-NEXT: retq
;
@@ -354,7 +354,7 @@ define <2 x i64> @testv2i64u(<2 x i64> %
; AVX512VPOPCNTDQ-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; AVX512VPOPCNTDQ-NEXT: vpaddq %xmm1, %xmm0, %xmm0
; AVX512VPOPCNTDQ-NEXT: vpopcntq %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: vzeroupper
; AVX512VPOPCNTDQ-NEXT: retq
;
@@ -625,7 +625,7 @@ define <4 x i32> @testv4i32(<4 x i32> %i
; AVX512VPOPCNTDQ-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; AVX512VPOPCNTDQ-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX512VPOPCNTDQ-NEXT: vpopcntd %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: vzeroupper
; AVX512VPOPCNTDQ-NEXT: retq
;
@@ -886,7 +886,7 @@ define <4 x i32> @testv4i32u(<4 x i32> %
; AVX512VPOPCNTDQ-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; AVX512VPOPCNTDQ-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX512VPOPCNTDQ-NEXT: vpopcntd %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: vzeroupper
; AVX512VPOPCNTDQ-NEXT: retq
;
@@ -1104,7 +1104,7 @@ define <8 x i16> @testv8i16(<8 x i16> %i
; BITALG_NOVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; BITALG_NOVLX-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; BITALG_NOVLX-NEXT: vpopcntw %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: vzeroupper
; BITALG_NOVLX-NEXT: retq
;
@@ -1286,7 +1286,7 @@ define <8 x i16> @testv8i16u(<8 x i16> %
; BITALG_NOVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; BITALG_NOVLX-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; BITALG_NOVLX-NEXT: vpopcntw %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: vzeroupper
; BITALG_NOVLX-NEXT: retq
;
@@ -1449,7 +1449,7 @@ define <16 x i8> @testv16i8(<16 x i8> %i
; BITALG_NOVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; BITALG_NOVLX-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; BITALG_NOVLX-NEXT: vpopcntb %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: vzeroupper
; BITALG_NOVLX-NEXT: retq
;
@@ -1608,7 +1608,7 @@ define <16 x i8> @testv16i8u(<16 x i8> %
; BITALG_NOVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; BITALG_NOVLX-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; BITALG_NOVLX-NEXT: vpopcntb %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: vzeroupper
; BITALG_NOVLX-NEXT: retq
;
Modified: llvm/trunk/test/CodeGen/X86/vector-tzcnt-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-tzcnt-256.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-tzcnt-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-tzcnt-256.ll Tue Nov 28 09:15:09 2017
@@ -103,7 +103,7 @@ define <4 x i64> @testv4i64(<4 x i64> %i
; AVX512VPOPCNTDQ-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; AVX512VPOPCNTDQ-NEXT: vpaddq %ymm1, %ymm0, %ymm0
; AVX512VPOPCNTDQ-NEXT: vpopcntq %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: retq
;
; BITALG_NOVLX-LABEL: testv4i64:
@@ -239,7 +239,7 @@ define <4 x i64> @testv4i64u(<4 x i64> %
; AVX512VPOPCNTDQ-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; AVX512VPOPCNTDQ-NEXT: vpaddq %ymm1, %ymm0, %ymm0
; AVX512VPOPCNTDQ-NEXT: vpopcntq %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: retq
;
; BITALG_NOVLX-LABEL: testv4i64u:
@@ -411,7 +411,7 @@ define <8 x i32> @testv8i32(<8 x i32> %i
; AVX512VPOPCNTDQ-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; AVX512VPOPCNTDQ-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; AVX512VPOPCNTDQ-NEXT: vpopcntd %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: retq
;
; BITALG_NOVLX-LABEL: testv8i32:
@@ -572,7 +572,7 @@ define <8 x i32> @testv8i32u(<8 x i32> %
; AVX512VPOPCNTDQ-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; AVX512VPOPCNTDQ-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; AVX512VPOPCNTDQ-NEXT: vpopcntd %zmm0, %zmm0
-; AVX512VPOPCNTDQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512VPOPCNTDQ-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512VPOPCNTDQ-NEXT: retq
;
; BITALG_NOVLX-LABEL: testv8i32u:
@@ -759,7 +759,7 @@ define <16 x i16> @testv16i16(<16 x i16>
; BITALG_NOVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; BITALG_NOVLX-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; BITALG_NOVLX-NEXT: vpopcntw %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: retq
;
; BITALG-LABEL: testv16i16:
@@ -910,7 +910,7 @@ define <16 x i16> @testv16i16u(<16 x i16
; BITALG_NOVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; BITALG_NOVLX-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; BITALG_NOVLX-NEXT: vpopcntw %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: retq
;
; BITALG-LABEL: testv16i16u:
@@ -1051,7 +1051,7 @@ define <32 x i8> @testv32i8(<32 x i8> %i
; BITALG_NOVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; BITALG_NOVLX-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; BITALG_NOVLX-NEXT: vpopcntb %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: retq
;
; BITALG-LABEL: testv32i8:
@@ -1189,7 +1189,7 @@ define <32 x i8> @testv32i8u(<32 x i8> %
; BITALG_NOVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; BITALG_NOVLX-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; BITALG_NOVLX-NEXT: vpopcntb %zmm0, %zmm0
-; BITALG_NOVLX-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; BITALG_NOVLX-NEXT: retq
;
; BITALG-LABEL: testv32i8u:
Modified: llvm/trunk/test/CodeGen/X86/vpshufbitqbm-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vpshufbitqbm-intrinsics.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vpshufbitqbm-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vpshufbitqbm-intrinsics.ll Tue Nov 28 09:15:09 2017
@@ -8,7 +8,7 @@ define i16 @test_vpshufbitqmb_128(<16 x
; CHECK-NEXT: kmovd %edi, %k1
; CHECK-NEXT: vpshufbitqmb %xmm1, %xmm0, %k0 {%k1}
; CHECK-NEXT: kmovd %k0, %eax
-; CHECK-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
+; CHECK-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
; CHECK-NEXT: retq
%res = call i16 @llvm.x86.avx512.mask.vpshufbitqmb.128(<16 x i8> %a, <16 x i8> %b, i16 %mask)
ret i16 %res
Modified: llvm/trunk/test/CodeGen/X86/vselect-pcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vselect-pcmp.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vselect-pcmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vselect-pcmp.ll Tue Nov 28 09:15:09 2017
@@ -182,13 +182,13 @@ define <8 x i32> @signbit_sel_v8i32(<8 x
;
; AVX512F-LABEL: signbit_sel_v8i32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %YMM2<def> %YMM2<kill> %ZMM2<def>
-; AVX512F-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: # kill: %ymm2<def> %ymm2<kill> %zmm2<def>
+; AVX512F-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3
; AVX512F-NEXT: vpcmpgtd %zmm2, %zmm3, %k1
; AVX512F-NEXT: vpblendmd %zmm0, %zmm1, %zmm0 {%k1}
-; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512F-NEXT: retq
;
; AVX512VL-LABEL: signbit_sel_v8i32:
Modified: llvm/trunk/test/CodeGen/X86/widen_bitops-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_bitops-0.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/widen_bitops-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/widen_bitops-0.ll Tue Nov 28 09:15:09 2017
@@ -141,9 +141,9 @@ define <3 x i8> @and_v3i8_as_i24(<3 x i8
; X32-SSE-NEXT: pextrb $0, %xmm1, %eax
; X32-SSE-NEXT: pextrb $4, %xmm1, %edx
; X32-SSE-NEXT: pextrb $8, %xmm1, %ecx
-; X32-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; X32-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
-; X32-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X32-SSE-NEXT: # kill: %al<def> %al<kill> %eax<kill>
+; X32-SSE-NEXT: # kill: %dl<def> %dl<kill> %edx<kill>
+; X32-SSE-NEXT: # kill: %cl<def> %cl<kill> %ecx<kill>
; X32-SSE-NEXT: retl
;
; X64-SSE-LABEL: and_v3i8_as_i24:
@@ -158,9 +158,9 @@ define <3 x i8> @and_v3i8_as_i24(<3 x i8
; X64-SSE-NEXT: pextrb $0, %xmm1, %eax
; X64-SSE-NEXT: pextrb $4, %xmm1, %edx
; X64-SSE-NEXT: pextrb $8, %xmm1, %ecx
-; X64-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; X64-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
-; X64-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X64-SSE-NEXT: # kill: %al<def> %al<kill> %eax<kill>
+; X64-SSE-NEXT: # kill: %dl<def> %dl<kill> %edx<kill>
+; X64-SSE-NEXT: # kill: %cl<def> %cl<kill> %ecx<kill>
; X64-SSE-NEXT: retq
%1 = bitcast <3 x i8> %a to i24
%2 = bitcast <3 x i8> %b to i24
@@ -182,9 +182,9 @@ define <3 x i8> @xor_v3i8_as_i24(<3 x i8
; X32-SSE-NEXT: pextrb $0, %xmm1, %eax
; X32-SSE-NEXT: pextrb $4, %xmm1, %edx
; X32-SSE-NEXT: pextrb $8, %xmm1, %ecx
-; X32-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; X32-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
-; X32-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X32-SSE-NEXT: # kill: %al<def> %al<kill> %eax<kill>
+; X32-SSE-NEXT: # kill: %dl<def> %dl<kill> %edx<kill>
+; X32-SSE-NEXT: # kill: %cl<def> %cl<kill> %ecx<kill>
; X32-SSE-NEXT: retl
;
; X64-SSE-LABEL: xor_v3i8_as_i24:
@@ -199,9 +199,9 @@ define <3 x i8> @xor_v3i8_as_i24(<3 x i8
; X64-SSE-NEXT: pextrb $0, %xmm1, %eax
; X64-SSE-NEXT: pextrb $4, %xmm1, %edx
; X64-SSE-NEXT: pextrb $8, %xmm1, %ecx
-; X64-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; X64-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
-; X64-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X64-SSE-NEXT: # kill: %al<def> %al<kill> %eax<kill>
+; X64-SSE-NEXT: # kill: %dl<def> %dl<kill> %edx<kill>
+; X64-SSE-NEXT: # kill: %cl<def> %cl<kill> %ecx<kill>
; X64-SSE-NEXT: retq
%1 = bitcast <3 x i8> %a to i24
%2 = bitcast <3 x i8> %b to i24
@@ -223,9 +223,9 @@ define <3 x i8> @or_v3i8_as_i24(<3 x i8>
; X32-SSE-NEXT: pextrb $0, %xmm1, %eax
; X32-SSE-NEXT: pextrb $4, %xmm1, %edx
; X32-SSE-NEXT: pextrb $8, %xmm1, %ecx
-; X32-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; X32-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
-; X32-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X32-SSE-NEXT: # kill: %al<def> %al<kill> %eax<kill>
+; X32-SSE-NEXT: # kill: %dl<def> %dl<kill> %edx<kill>
+; X32-SSE-NEXT: # kill: %cl<def> %cl<kill> %ecx<kill>
; X32-SSE-NEXT: retl
;
; X64-SSE-LABEL: or_v3i8_as_i24:
@@ -240,9 +240,9 @@ define <3 x i8> @or_v3i8_as_i24(<3 x i8>
; X64-SSE-NEXT: pextrb $0, %xmm1, %eax
; X64-SSE-NEXT: pextrb $4, %xmm1, %edx
; X64-SSE-NEXT: pextrb $8, %xmm1, %ecx
-; X64-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; X64-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
-; X64-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X64-SSE-NEXT: # kill: %al<def> %al<kill> %eax<kill>
+; X64-SSE-NEXT: # kill: %dl<def> %dl<kill> %edx<kill>
+; X64-SSE-NEXT: # kill: %cl<def> %cl<kill> %ecx<kill>
; X64-SSE-NEXT: retq
%1 = bitcast <3 x i8> %a to i24
%2 = bitcast <3 x i8> %b to i24
Modified: llvm/trunk/test/CodeGen/X86/x86-interleaved-access.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-interleaved-access.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-interleaved-access.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-interleaved-access.ll Tue Nov 28 09:15:09 2017
@@ -651,7 +651,7 @@ define <16 x i1> @interleaved_load_vf16_
; AVX512-NEXT: vpmovb2m %zmm0, %k1
; AVX512-NEXT: kxnorw %k1, %k0, %k0
; AVX512-NEXT: vpmovm2b %k0, %zmm0
-; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%wide.vec = load <64 x i8>, <64 x i8>* %ptr
@@ -964,7 +964,7 @@ define <32 x i1> @interleaved_load_vf32_
; AVX512-NEXT: vpmovb2m %zmm0, %k1
; AVX512-NEXT: kxnord %k1, %k0, %k0
; AVX512-NEXT: vpmovm2b %k0, %zmm0
-; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<kill>
; AVX512-NEXT: retq
%wide.vec = load <128 x i8>, <128 x i8>* %ptr
%v1 = shufflevector <128 x i8> %wide.vec, <128 x i8> undef, <32 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28, i32 32, i32 36, i32 40, i32 44, i32 48, i32 52, i32 56, i32 60, i32 64, i32 68, i32 72, i32 76, i32 80, i32 84, i32 88, i32 92, i32 96, i32 100, i32 104, i32 108, i32 112, i32 116, i32 120, i32 124>
Modified: llvm/trunk/test/CodeGen/X86/x86-interrupt_cc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-interrupt_cc.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-interrupt_cc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-interrupt_cc.ll Tue Nov 28 09:15:09 2017
@@ -1,7 +1,7 @@
; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-macosx -show-mc-encoding -mattr=+avx512f < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK64
; RUN: llc -verify-machineinstrs -mtriple=i386-apple-macosx -show-mc-encoding -mattr=+avx512f < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK32
-; Make sure we spill the high numbered ZMM registers and K registers with the right encoding.
+; Make sure we spill the high numbered zmm registers and K registers with the right encoding.
; CHECK-LABEL: foo
; CHECK: kmovq %k7, {{.+}}
; CHECK64: encoding: [0xc4,0xe1,0xf8,0x91,0xbc,0x24,0x68,0x08,0x00,0x00]
Modified: llvm/trunk/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll Tue Nov 28 09:15:09 2017
@@ -3,10 +3,10 @@
;; In functions with 'no_caller_saved_registers' attribute, all registers should
;; be preserved except for registers used for passing/returning arguments.
-;; In the following function registers %RDI, %RSI and %XMM0 are used to store
-;; arguments %a0, %a1 and %b0 accordingally. The value is returned in %RAX.
+;; In the following function registers %rdi, %rsi and %xmm0 are used to store
+;; arguments %a0, %a1 and %b0 accordingally. The value is returned in %rax.
;; The above registers should not be preserved, however other registers
-;; (that are modified by the function) should be preserved (%RDX and %XMM1).
+;; (that are modified by the function) should be preserved (%rdx and %xmm1).
define x86_64_sysvcc i32 @bar(i32 %a0, i32 %a1, float %b0) #0 {
; CHECK-LABEL: bar:
; CHECK: # BB#0:
@@ -27,7 +27,7 @@ define x86_64_sysvcc i32 @bar(i32 %a0, i
;; Because "bar" has 'no_caller_saved_registers' attribute, function "foo"
;; doesn't need to preserve registers except for the arguments passed
-;; to "bar" (%ESI, %EDI and %XMM0).
+;; to "bar" (%esi, %edi and %xmm0).
define x86_64_sysvcc float @foo(i32 %a0, i32 %a1, float %b0) {
; CHECK-LABEL: foo
; CHECK: movaps %xmm0, %xmm1
Modified: llvm/trunk/test/CodeGen/X86/x86-upgrade-avx2-vbroadcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-upgrade-avx2-vbroadcast.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-upgrade-avx2-vbroadcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-upgrade-avx2-vbroadcast.ll Tue Nov 28 09:15:09 2017
@@ -8,7 +8,7 @@ target datalayout = "e-m:o-i64:64-f80:12
define <4 x i64> @broadcast128(<2 x i64> %src) {
; CHECK-LABEL: broadcast128:
; CHECK: ## BB#0:
-; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; CHECK-NEXT: ## kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; CHECK-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
; CHECK-NEXT: retq
Modified: llvm/trunk/test/DebugInfo/ARM/PR16736.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/ARM/PR16736.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/ARM/PR16736.ll (original)
+++ llvm/trunk/test/DebugInfo/ARM/PR16736.ll Tue Nov 28 09:15:09 2017
@@ -2,7 +2,7 @@
; RUN: llc -filetype=obj < %s \
; RUN: | llvm-dwarfdump -debug-info - | FileCheck %s --check-prefix=DWARF
;
-; CHECK: @DEBUG_VALUE: h:x <- [DW_OP_plus_uconst {{.*}}] [%R{{.*}}+0]
+; CHECK: @DEBUG_VALUE: h:x <- [DW_OP_plus_uconst {{.*}}] [%r{{.*}}+0]
; DWARF: DW_TAG_formal_parameter
; DWARF: DW_AT_location
; DWARF-NEXT: DW_OP_reg0 R0
Modified: llvm/trunk/test/DebugInfo/ARM/sdag-split-arg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/ARM/sdag-split-arg.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/ARM/sdag-split-arg.ll (original)
+++ llvm/trunk/test/DebugInfo/ARM/sdag-split-arg.ll Tue Nov 28 09:15:09 2017
@@ -19,8 +19,8 @@ target triple = "thumbv7k-apple-watchos2
; Function Attrs: optsize ssp
define i64 @_Z3foox(i64 returned) local_unnamed_addr #0 !dbg !13 {
tail call void @llvm.dbg.value(metadata i64 %0, metadata !17, metadata !DIExpression()), !dbg !18
- ; CHECK: @DEBUG_VALUE: foo:offset <- [DW_OP_LLVM_fragment 0 32] %R5
- ; CHECK: @DEBUG_VALUE: foo:offset <- [DW_OP_LLVM_fragment 32 32] %R4
+ ; CHECK: @DEBUG_VALUE: foo:offset <- [DW_OP_LLVM_fragment 0 32] %r5
+ ; CHECK: @DEBUG_VALUE: foo:offset <- [DW_OP_LLVM_fragment 32 32] %r4
%2 = load i64, i64* @g, align 8, !dbg !19, !tbaa !21
%3 = icmp eq i64 %2, %0, !dbg !19
Modified: llvm/trunk/test/DebugInfo/COFF/fpo-csrs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/fpo-csrs.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/fpo-csrs.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/fpo-csrs.ll Tue Nov 28 09:15:09 2017
@@ -65,7 +65,7 @@ entry:
; ASM: pushl %esi
; ASM: .cv_fpo_pushreg %esi
; ASM: .cv_fpo_endprologue
-; ASM: #DEBUG_VALUE: csr1:a <- %ESI
+; ASM: #DEBUG_VALUE: csr1:a <- %esi
; ASM: retl
; ASM: .cv_fpo_endproc
@@ -122,8 +122,8 @@ entry:
; ASM: pushl %esi
; ASM: .cv_fpo_pushreg %esi
; ASM: .cv_fpo_endprologue
-; ASM: #DEBUG_VALUE: csr2:a <- %ESI
-; ASM: #DEBUG_VALUE: csr2:b <- %EDI
+; ASM: #DEBUG_VALUE: csr2:a <- %esi
+; ASM: #DEBUG_VALUE: csr2:b <- %edi
; ASM: retl
; ASM: .cv_fpo_endproc
@@ -192,9 +192,9 @@ entry:
; ASM: pushl %esi
; ASM: .cv_fpo_pushreg %esi
; ASM: .cv_fpo_endprologue
-; ASM: #DEBUG_VALUE: csr3:a <- %ESI
-; ASM: #DEBUG_VALUE: csr3:b <- %EDI
-; ASM: #DEBUG_VALUE: csr3:c <- %EBX
+; ASM: #DEBUG_VALUE: csr3:a <- %esi
+; ASM: #DEBUG_VALUE: csr3:b <- %edi
+; ASM: #DEBUG_VALUE: csr3:c <- %ebx
; ASM: retl
; ASM: .cv_fpo_endproc
@@ -279,10 +279,10 @@ entry:
; ASM: pushl %esi
; ASM: .cv_fpo_pushreg %esi
; ASM: .cv_fpo_endprologue
-; ASM: #DEBUG_VALUE: csr4:a <- %ESI
-; ASM: #DEBUG_VALUE: csr4:b <- %EDI
-; ASM: #DEBUG_VALUE: csr4:c <- %EBX
-; ASM: #DEBUG_VALUE: csr4:d <- %EBP
+; ASM: #DEBUG_VALUE: csr4:a <- %esi
+; ASM: #DEBUG_VALUE: csr4:b <- %edi
+; ASM: #DEBUG_VALUE: csr4:c <- %ebx
+; ASM: #DEBUG_VALUE: csr4:d <- %ebp
; ASM: retl
; ASM: .cv_fpo_endproc
Modified: llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll Tue Nov 28 09:15:09 2017
@@ -2,7 +2,7 @@
; RUN: llc -mtriple=x86_64-windows-msvc < %s -filetype=obj | llvm-readobj -codeview - | FileCheck %s --check-prefix=OBJ
; This test attempts to exercise gaps in local variables. The local variable 'p'
-; will end up in some CSR (ESI), which will be used in both the BB scheduled
+; will end up in some CSR (esi), which will be used in both the BB scheduled
; discontiguously out of line and the normal return BB. The best way to encode
; this is to use a LocalVariableAddrGap. If the gap is too large, multiple
; ranges should be emitted.
@@ -33,13 +33,13 @@
; ASM: callq vardef
; ASM: movl %eax, %esi
; ASM: [[p_b1:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: p <- %ESI
+; ASM: #DEBUG_VALUE: p <- %esi
; ASM: callq barrier
; ASM: movl %esi, %ecx
; ASM: testl %eax, %eax
; ASM: jne .LBB0_5
; ASM: # BB#2: # %if.end
-; ASM: #DEBUG_VALUE: p <- %ESI
+; ASM: #DEBUG_VALUE: p <- %esi
; ASM: callq use
; ASM: jmp .LBB0_4
; ASM: [[p_e1:\.Ltmp[0-9]+]]:
@@ -52,7 +52,7 @@
; ASM: retq
; ASM: .LBB0_5: # %if.then4
; ASM: [[p_b2:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: p <- %ESI
+; ASM: #DEBUG_VALUE: p <- %esi
; ASM: callq call_noreturn
; ASM: ud2
; ASM: .Lfunc_end0:
Modified: llvm/trunk/test/DebugInfo/COFF/pieces.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/pieces.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/pieces.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/pieces.ll Tue Nov 28 09:15:09 2017
@@ -43,19 +43,19 @@
; ASM: .p2align 4, 0x90
; ASM: .LBB0_3: # %for.body
; ASM: [[ox_start:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] %EDI
+; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] %edi
; ASM: .cv_loc 0 1 13 11 # t.c:13:11
; ASM: movl %edi, %ecx
; ASM: callq g
; ASM: movl %eax, %edi
; ASM: [[oy_start:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] %EDI
-; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] %ESI
+; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] %edi
+; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] %esi
; ASM: .cv_loc 0 1 14 11 # t.c:14:11
; ASM: movl %esi, %ecx
; ASM: callq g
; ASM: movl %eax, %esi
-; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] %ESI
+; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] %esi
; ASM: cmpl n(%rip), %eax
; ASM: jl .LBB0_3
; ASM: [[oy_end:\.Ltmp[0-9]+]]:
@@ -64,23 +64,23 @@
; ASM-LABEL: pad_right: # @pad_right
-; ASM: #DEBUG_VALUE: pad_right:o <- [DW_OP_LLVM_fragment 32 32] %ECX
+; ASM: #DEBUG_VALUE: pad_right:o <- [DW_OP_LLVM_fragment 32 32] %ecx
; ASM: movl %ecx, %eax
; ASM: retq
; ASM-LABEL: pad_left: # @pad_left
-; ASM: #DEBUG_VALUE: pad_left:o <- [DW_OP_LLVM_fragment 0 32] %ECX
+; ASM: #DEBUG_VALUE: pad_left:o <- [DW_OP_LLVM_fragment 0 32] %ecx
; ASM: .cv_loc 2 1 24 3 # t.c:24:3
; ASM: movl %ecx, %eax
; ASM: retq
; ASM-LABEL: nested: # @nested
-; ASM: #DEBUG_VALUE: nested:o <- [DW_OP_deref] [%RCX+0]
+; ASM: #DEBUG_VALUE: nested:o <- [DW_OP_deref] [%rcx+0]
; ASM: movl 12(%rcx), %eax
; ASM: [[p_start:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: nested:p <- [DW_OP_LLVM_fragment 32 32] %EAX
+; ASM: #DEBUG_VALUE: nested:p <- [DW_OP_LLVM_fragment 32 32] %eax
; ASM: retq
; ASM-LABEL: bitpiece_spill: # @bitpiece_spill
@@ -89,7 +89,7 @@
; ASM: callq g
; ASM: movl %eax, [[offset_o_x:[0-9]+]](%rsp) # 4-byte Spill
; ASM: [[spill_o_x_start:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offset_o_x]], DW_OP_LLVM_fragment 32 32] [%RSP+0]
+; ASM: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offset_o_x]], DW_OP_LLVM_fragment 32 32] [%rsp+0]
; ASM: #APP
; ASM: #NO_APP
; ASM: movl [[offset_o_x]](%rsp), %eax # 4-byte Reload
Modified: llvm/trunk/test/DebugInfo/COFF/register-variables.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/register-variables.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/register-variables.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/register-variables.ll Tue Nov 28 09:15:09 2017
@@ -26,30 +26,30 @@
; ASM: # BB#0: # %entry
; ASM: pushq %rsi
; ASM: subq $32, %rsp
-; ASM: #DEBUG_VALUE: f:p <- %ECX
+; ASM: #DEBUG_VALUE: f:p <- %ecx
; ASM: movl %ecx, %esi
; ASM: [[p_ecx_esi:\.Ltmp.*]]:
-; ASM: #DEBUG_VALUE: f:p <- %ESI
+; ASM: #DEBUG_VALUE: f:p <- %esi
; ASM: callq getint
; ASM: [[after_getint:\.Ltmp.*]]:
-; ASM: #DEBUG_VALUE: a <- %EAX
-; ASM: #DEBUG_VALUE: inlineinc:a <- %EAX
-; ASM: #DEBUG_VALUE: c <- %EAX
+; ASM: #DEBUG_VALUE: a <- %eax
+; ASM: #DEBUG_VALUE: inlineinc:a <- %eax
+; ASM: #DEBUG_VALUE: c <- %eax
; ASM: testl %esi, %esi
; ASM: je .LBB0_2
; ASM: [[after_je:\.Ltmp.*]]:
; ASM: # BB#1: # %if.then
-; ASM-DAG: #DEBUG_VALUE: inlineinc:a <- %EAX
-; ASM-DAG: #DEBUG_VALUE: a <- %EAX
-; ASM-DAG: #DEBUG_VALUE: f:p <- %ESI
+; ASM-DAG: #DEBUG_VALUE: inlineinc:a <- %eax
+; ASM-DAG: #DEBUG_VALUE: a <- %eax
+; ASM-DAG: #DEBUG_VALUE: f:p <- %esi
; ASM: addl $1, %eax
; ASM: [[after_inc_eax:\.Ltmp.*]]:
-; ASM: #DEBUG_VALUE: inlineinc:b <- %EAX
-; ASM: #DEBUG_VALUE: b <- %EAX
+; ASM: #DEBUG_VALUE: inlineinc:b <- %eax
+; ASM: #DEBUG_VALUE: b <- %eax
; ASM: addl $1, x(%rip)
; ASM: [[after_if:\.Ltmp.*]]:
; ASM: .LBB0_2: # %if.else
-; ASM: #DEBUG_VALUE: f:p <- %ESI
+; ASM: #DEBUG_VALUE: f:p <- %esi
; ASM: movl %eax, %ecx
; ASM: addq $32, %rsp
; ASM: popq %rsi
Modified: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir Tue Nov 28 09:15:09 2017
@@ -147,15 +147,15 @@ body: |
...
# Let's verify that the slot index ranges for the unused variables argc/argv,
-# connected to physical regs %EDI and %RSI, does not overlap with the ranges
+# connected to physical regs %edi and %rsi, does not overlap with the ranges
# for %vreg2 and %vreg3. The register allocator is actually allocating the
-# virtual registers # to %EDI and %ESI, so the ranges for argc/argv should
+# virtual registers # to %edi and %esi, so the ranges for argc/argv should
# not cover the whole BB.
#
# CHECKDBG-LABEL: ********** EMITTING LIVE DEBUG VARIABLES **********
-# CHECKDBG-NEXT: !"argc,5" [0B;0e):0 Loc0=%EDI
+# CHECKDBG-NEXT: !"argc,5" [0B;0e):0 Loc0=%edi
# CHECKDBG-NEXT: [0B;0e):0 BB#0-160B
-# CHECKDBG-NEXT: !"argv,5" [0B;0e):0 Loc0=%RSI
+# CHECKDBG-NEXT: !"argv,5" [0B;0e):0 Loc0=%rsi
# CHECKDBG-NEXT: [0B;0e):0 BB#0-160B
# CHECKDBG-NEXT: !"a0,7" [16r;64r):0 Loc0=%vreg2
# CHECKDBG-NEXT: [16r;64r):0 BB#0-160B
Modified: llvm/trunk/test/DebugInfo/X86/dbg-addr-dse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-addr-dse.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-addr-dse.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-addr-dse.ll Tue Nov 28 09:15:09 2017
@@ -47,12 +47,12 @@ entry:
; ASM-LABEL: f: # @f
; ASM: movl %ecx, [[OFF_X:[0-9]+]](%rsp)
-; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%RSP+0]
+; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%rsp+0]
; ASM: callq escape
; ASM: #DEBUG_VALUE: f:x <- 1
; ASM: movl $1, global(%rip)
; FIXME: Needs a fix to LiveDebugVariables
-; ASMX: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%RSP+0]
+; ASMX: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%rsp+0]
; ASM: movl $2, [[OFF_X]](%rsp)
; ASM: callq escape
; ASM: retq
Modified: llvm/trunk/test/DebugInfo/X86/dbg-addr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-addr.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-addr.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-addr.ll Tue Nov 28 09:15:09 2017
@@ -7,7 +7,7 @@
; is control-dependent.
; CHECK-LABEL: use_dbg_addr:
-; CHECK: #DEBUG_VALUE: use_dbg_addr:o <- [%RSP+0]
+; CHECK: #DEBUG_VALUE: use_dbg_addr:o <- [%rsp+0]
; FIXME: Avoid the use of a single-location location list and use
; DW_AT_start_offset instead.
Modified: llvm/trunk/test/DebugInfo/X86/dbg-value-dag-combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-value-dag-combine.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-value-dag-combine.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-value-dag-combine.ll Tue Nov 28 09:15:09 2017
@@ -8,8 +8,8 @@ target triple = "i686-apple-darwin"
; CHECK-LABEL: __OpenCL_test_kernel:
; CHECK-DAG: ##DEBUG_VALUE: __OpenCL_test_kernel:ip <-
; CHECK-DAG: ##DEBUG_VALUE: xxx <- 0
-; CHECK-DAG: ##DEBUG_VALUE: gid <- %E{{..$}}
-; CHECK-DAG: ##DEBUG_VALUE: idx <- %E{{..$}}
+; CHECK-DAG: ##DEBUG_VALUE: gid <- %e{{..$}}
+; CHECK-DAG: ##DEBUG_VALUE: idx <- %e{{..$}}
; CHECK-NOT: ##DEBUG_VALUE:
declare <4 x i32> @__amdil_get_global_id_int()
Modified: llvm/trunk/test/DebugInfo/X86/dbg-value-frame-index.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-value-frame-index.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-value-frame-index.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-value-frame-index.ll Tue Nov 28 09:15:09 2017
@@ -20,7 +20,7 @@ while.end:
}
; CHECK-LABEL: test
-; CHECK: #DEBUG_VALUE: test:w <- [DW_OP_plus_uconst 8] [%RSP+0]
+; CHECK: #DEBUG_VALUE: test:w <- [DW_OP_plus_uconst 8] [%rsp+0]
; DWARF: DW_AT_location [DW_FORM_sec_offset] (
; DWARF-NEXT: {{.*}} - {{.*}}: DW_OP_breg7 RSP+8)
Modified: llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll Tue Nov 28 09:15:09 2017
@@ -5,11 +5,11 @@
; of individual register def operands.
; ASM: main: # @main
-; ASM: #DEBUG_VALUE: main:argc <- %ECX
+; ASM: #DEBUG_VALUE: main:argc <- %ecx
; ASM: movl $1, x(%rip)
; ASM: callq clobber
; ASM-NEXT: [[argc_range_end:.Ltmp[0-9]+]]:
-; Previously LiveDebugValues would claim argc was still in ECX after the call.
+; Previously LiveDebugValues would claim argc was still in ecx after the call.
; ASM-NOT: #DEBUG_VALUE: main:argc
; argc is the first debug location.
Modified: llvm/trunk/test/DebugInfo/X86/dbg-value-transfer-order.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-value-transfer-order.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-value-transfer-order.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-value-transfer-order.ll Tue Nov 28 09:15:09 2017
@@ -33,7 +33,7 @@
; CHECK: movl %eax, %ecx
; CHECK: .LBB0_3: # %if.end
; Check that this DEBUG_VALUE comes before the left shift.
-; CHECK: #DEBUG_VALUE: bit_offset <- %ECX
+; CHECK: #DEBUG_VALUE: bit_offset <- %ecx
; CHECK: .cv_loc 0 1 8 28 # t.c:8:28
; CHECK: movl $1, %[[reg:[^ ]*]]
; CHECK: shll %cl, %[[reg]]
Modified: llvm/trunk/test/DebugInfo/X86/debug-loc-asan.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/debug-loc-asan.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/debug-loc-asan.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/debug-loc-asan.ll Tue Nov 28 09:15:09 2017
@@ -12,9 +12,9 @@
; with "clang++ -S -emit-llvm -mllvm -asan-skip-promotable-allocas=0 -fsanitize=address -O0 -g test.cc"
; The address of the (potentially now malloc'ed) alloca ends up
-; in RDI, after which it is spilled to the stack. We record the
+; in rdi, after which it is spilled to the stack. We record the
; spill OFFSET on the stack for checking the debug info below.
-; CHECK: #DEBUG_VALUE: bar:y <- [DW_OP_deref] [%RDI+0]
+; CHECK: #DEBUG_VALUE: bar:y <- [DW_OP_deref] [%rdi+0]
; CHECK: movq %rdi, [[OFFSET:[0-9]+]](%rsp)
; CHECK-NEXT: [[START_LABEL:.Ltmp[0-9]+]]
; CHECK-NEXT: #DEBUG_VALUE: bar:y <- [DW_OP_plus_uconst [[OFFSET]], DW_OP_deref, DW_OP_deref]
Modified: llvm/trunk/test/DebugInfo/X86/live-debug-values.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/live-debug-values.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/live-debug-values.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/live-debug-values.ll Tue Nov 28 09:15:09 2017
@@ -30,7 +30,7 @@
; DBG_VALUE for variable "n" is extended into BB#5 from its predecessors BB#3
; and BB#4.
; CHECK: .LBB0_5:
-; CHECK-NEXT: #DEBUG_VALUE: main:n <- %EBX
+; CHECK-NEXT: #DEBUG_VALUE: main:n <- %ebx
; Other register values have been clobbered.
; CHECK-NOT: #DEBUG_VALUE:
; CHECK: movl %ecx, m(%rip)
Modified: llvm/trunk/test/DebugInfo/X86/live-debug-vars-dse.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/live-debug-vars-dse.mir?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/live-debug-vars-dse.mir (original)
+++ llvm/trunk/test/DebugInfo/X86/live-debug-vars-dse.mir Tue Nov 28 09:15:09 2017
@@ -13,12 +13,12 @@
# CHECK-LABEL: f: # @f
# CHECK: movl %ecx, [[OFF_X:[0-9]+]](%rsp)
-# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%RSP+0]
+# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%rsp+0]
# CHECK: leaq [[OFF_X]](%rsp), %rsi
# CHECK: callq escape
# CHECK: #DEBUG_VALUE: f:x <- 1
# CHECK: movl $1, global(%rip)
-# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%RSP+0]
+# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%rsp+0]
# CHECK: movl $2, [[OFF_X]](%rsp)
# CHECK: callq escape
# CHECK: retq
Modified: llvm/trunk/test/DebugInfo/X86/op_deref.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/op_deref.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/op_deref.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/op_deref.ll Tue Nov 28 09:15:09 2017
@@ -17,7 +17,7 @@
; Check the DEBUG_VALUE comments for good measure.
; RUN: llc -O0 -mtriple=x86_64-apple-darwin %s -o - -filetype=asm | FileCheck %s -check-prefix=ASM-CHECK
; vla should have a register-indirect address at one point.
-; ASM-CHECK: DEBUG_VALUE: vla <- [DW_OP_deref] [%RCX+0]
+; ASM-CHECK: DEBUG_VALUE: vla <- [DW_OP_deref] [%rcx+0]
; ASM-CHECK: DW_OP_breg2
; RUN: llvm-as %s -o - | llvm-dis - | FileCheck %s --check-prefix=PRETTY-PRINT
Modified: llvm/trunk/test/DebugInfo/X86/pieces-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/pieces-4.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/pieces-4.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/pieces-4.ll Tue Nov 28 09:15:09 2017
@@ -17,7 +17,7 @@
; CHECK: callq g
; CHECK: movl %eax, [[offs:[0-9]+]](%rsp) # 4-byte Spill
; CHECK: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_LLVM_fragment 32 32] 0
-; CHECK: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offs]], DW_OP_LLVM_fragment 0 32] [%RSP+0]
+; CHECK: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offs]], DW_OP_LLVM_fragment 0 32] [%rsp+0]
; CHECK: #APP
; CHECK: #NO_APP
; CHECK: movl [[offs]](%rsp), %eax # 4-byte Reload
Modified: llvm/trunk/test/DebugInfo/X86/sdag-split-arg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sdag-split-arg.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/sdag-split-arg.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/sdag-split-arg.ll Tue Nov 28 09:15:09 2017
@@ -1,10 +1,10 @@
; RUN: llc -O0 -filetype=asm %s -o - | FileCheck %s
; Test large integral function arguments passed in multiple registers.
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 64 16] %AX
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 48 16] %R9W
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 32 16] %R10W
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 16 16] %R11W
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 0 16] %BX
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 64 16] %ax
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 48 16] %r9w
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 32 16] %r10w
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 16 16] %r11w
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 0 16] %bx
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
Modified: llvm/trunk/test/DebugInfo/X86/spill-indirect-nrvo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/spill-indirect-nrvo.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/spill-indirect-nrvo.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/spill-indirect-nrvo.ll Tue Nov 28 09:15:09 2017
@@ -21,9 +21,9 @@
; }
; CHECK-LABEL: _Z10get_stringv:
-; CHECK: #DEBUG_VALUE: get_string:result <- [%RDI+0]
+; CHECK: #DEBUG_VALUE: get_string:result <- [%rdi+0]
; CHECK: movq %rdi, [[OFFS:[0-9]+]](%rsp) # 8-byte Spill
-; CHECK: #DEBUG_VALUE: get_string:result <- [DW_OP_plus_uconst [[OFFS]], DW_OP_deref] [%RSP+0]
+; CHECK: #DEBUG_VALUE: get_string:result <- [DW_OP_plus_uconst [[OFFS]], DW_OP_deref] [%rsp+0]
; CHECK: callq _ZN6stringC1Ei
; CHECK: #APP
; CHECK: #NO_APP
Modified: llvm/trunk/test/DebugInfo/X86/spill-nontrivial-param.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/spill-nontrivial-param.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/spill-nontrivial-param.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/spill-nontrivial-param.ll Tue Nov 28 09:15:09 2017
@@ -20,9 +20,9 @@
; }
; CHECK-LABEL: _Z3foo10NonTrivial:
-; CHECK: #DEBUG_VALUE: foo:nt <- [%RDI+0]
+; CHECK: #DEBUG_VALUE: foo:nt <- [%rdi+0]
; CHECK: movq %rdi, -8(%rsp) # 8-byte Spill
-; CHECK: #DEBUG_VALUE: foo:nt <- [DW_OP_constu 8, DW_OP_minus, DW_OP_deref] [%RSP+0]
+; CHECK: #DEBUG_VALUE: foo:nt <- [DW_OP_constu 8, DW_OP_minus, DW_OP_deref] [%rsp+0]
; CHECK: #APP
; CHECK: #NO_APP
; CHECK: movq -8(%rsp), %rax # 8-byte Reload
Modified: llvm/trunk/test/DebugInfo/X86/spill-nospill.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/spill-nospill.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/spill-nospill.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/spill-nospill.ll Tue Nov 28 09:15:09 2017
@@ -24,12 +24,12 @@
; CHECK-LABEL: f: # @f
; CHECK: callq g
; CHECK: movl %eax, [[X_OFFS:[0-9]+]](%rsp) # 4-byte Spill
-; CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[X_OFFS]]] [%RSP+0]
+; CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[X_OFFS]]] [%rsp+0]
; CHECK: #APP
; CHECK: #NO_APP
; CHECK: callq g
; CHECK: movl %eax, %[[CSR:[^ ]*]]
-; CHECK: #DEBUG_VALUE: f:y <- %ESI
+; CHECK: #DEBUG_VALUE: f:y <- %esi
; CHECK: movl %[[CSR]], %ecx
; CHECK: callq g
; CHECK: movl %[[CSR]], %ecx
@@ -37,7 +37,7 @@
; CHECK: movl %[[CSR]], %ecx
; CHECK: callq g
; CHECK: movl [[X_OFFS]](%rsp), %eax # 4-byte Reload
-; CHECK: #DEBUG_VALUE: f:x <- %EAX
+; CHECK: #DEBUG_VALUE: f:x <- %eax
; CHECK: addl %[[CSR]], %eax
; DWARF: DW_TAG_variable
Modified: llvm/trunk/test/DebugInfo/X86/vla.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/vla.ll?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/vla.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/vla.ll Tue Nov 28 09:15:09 2017
@@ -1,6 +1,6 @@
; RUN: llc -O0 -mtriple=x86_64-apple-darwin -filetype=asm %s -o - | FileCheck %s
; Ensure that we generate an indirect location for the variable length array a.
-; CHECK: ##DEBUG_VALUE: vla:a <- [DW_OP_deref] [%RCX+0]
+; CHECK: ##DEBUG_VALUE: vla:a <- [DW_OP_deref] [%rcx+0]
; CHECK: DW_OP_breg2
; rdar://problem/13658587
;
Modified: llvm/trunk/test/MC/COFF/cv-def-range.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/cv-def-range.s?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/cv-def-range.s (original)
+++ llvm/trunk/test/MC/COFF/cv-def-range.s Tue Nov 28 09:15:09 2017
@@ -23,7 +23,7 @@ Lfunc_begin0:
subl $8, %esp
leal -4(%ebp), %eax
Lvar_begin0:
- #DEBUG_VALUE: g:x <- %EAX
+ #DEBUG_VALUE: g:x <- %eax
.cv_loc 0 1 4 7 # <stdin>:4:7
movl $0, -4(%ebp)
.cv_loc 0 1 5 3 # <stdin>:5:3
Modified: llvm/trunk/test/MC/X86/x86-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64.s?rev=319187&r1=319186&r2=319187&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-64.s (original)
+++ llvm/trunk/test/MC/X86/x86-64.s Tue Nov 28 09:15:09 2017
@@ -417,7 +417,7 @@ enter $0x7ace,$0x7f
// rdar://8456364
// CHECK: movw %cs, %ax
-mov %CS, %ax
+mov %cs, %ax
// rdar://8456391
fcmovb %st(1), %st(0) // CHECK: fcmovb %st(1), %st(0)
@@ -583,8 +583,8 @@ movmskpd %xmm6, %eax
fdivrp %st(0), %st(1) // CHECK: encoding: [0xde,0xf9]
fdivrp %st(1), %st(0) // CHECK: encoding: [0xde,0xf9]
-fsubrp %ST(0), %ST(1) // CHECK: encoding: [0xde,0xe9]
-fsubrp %ST(1), %ST(0) // CHECK: encoding: [0xde,0xe9]
+fsubrp %st(0), %st(1) // CHECK: encoding: [0xde,0xe9]
+fsubrp %st(1), %st(0) // CHECK: encoding: [0xde,0xe9]
// also PR8861
fdivp %st(0), %st(1) // CHECK: encoding: [0xde,0xf1]
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