[PATCH] D31852: [PowerPC] Convert reg/reg instructions fed by constants to reg/imm instructions (pre and post RA)

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added a comment.

In https://reviews.llvm.org/D31852#937396, @inouehrs wrote:

> I think that this pass can be used to optimize ISEL if the false reg is constant zero by inverting the predicate (but this can be another patch).


That's a good point @inouehrs. I can add this in a follow-up patch.


Repository:
  rL LLVM

https://reviews.llvm.org/D31852