[PATCH] D31852: [PowerPC] Convert reg/reg instructions fed by constants to reg/imm instructions (pre and post RA)

[Hiroshi Inoue via Phabricator via llvm-commits]

inouehrs added a comment.

I think that this pass can be used to optimize ISEL if the false reg is constant zero by inverting the predicate (but this can be another patch).


Repository:
  rL LLVM

https://reviews.llvm.org/D31852