[PATCH] D40351: [X86][FMA] Tag all FMA/FMA4 instructions with WriteFMA schedule class

[Gadi Haber via Phabricator via llvm-commits]

gadi.haber added inline comments.


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Comment at: lib/Target/X86/X86InstrAVX512.td:5793
           (_.VT (OpNode _.RC:$src2, _.RC:$src1, _.RC:$src3)), 1, 1>,
-         AVX512FMA3Base;
+          AVX512FMA3Base, Sched<[WriteFMA]>;
 
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I cannot find which port WriteFMA is set to here.

It should be set to Port01 on HSW, BDW and SkylakeClient
but it should be set to Port015 on SKX

This needs to be defined in the right .td files


Repository:
  rL LLVM

https://reviews.llvm.org/D40351