[PATCH] D40351: [X86][FMA] Tag all FMA/FMA4 instructions with WriteFMA schedule class
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 22 05:26:33 PST 2017
RKSimon created this revision.
As mentioned on PR17367, many instructions are missing scheduling tags preventing us from setting 'CompleteModel = 1' for better instruction analysis. This patch deals with the FMA/FMA4 which is one of the bigger offenders (along with AVX512 in general).
Annoyingly all scheduler models need to define WriteFMA (now that its actually used), even for older targets without FMA/FMA4 support, but that is an existing problem shared by other schedule classes.
Repository:
rL LLVM
https://reviews.llvm.org/D40351
Files:
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrFMA.td
lib/Target/X86/X86SchedBroadwell.td
lib/Target/X86/X86SchedHaswell.td
lib/Target/X86/X86SchedSandyBridge.td
lib/Target/X86/X86SchedSkylakeClient.td
lib/Target/X86/X86SchedSkylakeServer.td
lib/Target/X86/X86ScheduleBtVer2.td
lib/Target/X86/X86ScheduleSLM.td
lib/Target/X86/X86ScheduleZnver1.td
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D40351.123918.patch
Type: text/x-patch
Size: 26153 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20171122/47480cc5/attachment.bin>
More information about the llvm-commits
mailing list