[PATCH] D39595: [DAGCombine] Refactor ReduceLoadWidth
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 16 11:58:39 PST 2017
efriedma added inline comments.
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:8026
+ LN0->getChain(), LN0->getBasePtr(), ExtVT,
+ LN0->getMemOperand());
}
----------------
Could this block of code be simplified? As long as you set ExtType and ExtVT correctly, I think the rest of the checks already exist in some form, by analogy to the transforms for ISD::SIGN_EXTEND_IN_REG.
https://reviews.llvm.org/D39595
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