[PATCH] D39595: [DAGCombine] Refactor ReduceLoadWidth

[Florian Hahn via Phabricator via llvm-commits]

fhahn added reviewers: RKSimon, efriedma.
fhahn added a comment.

Looks like a reasonable refactor to me helping with https://reviews.llvm.org/D39604. Adding Simon & Eli as reviewers as I think they know the area better then myself.



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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:7999
                               VT.getSizeInBits() - N01->getZExtValue());
+  } else if (Opc == ISD::AND) {
+    bool HasAnyExt = N0.getOpcode() == ISD::ANY_EXTEND;
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samparker wrote:
> fhahn wrote:
> > I am probably missing something, but I am not sure if I see the real benefit of moving this code here.  It seems the visitAND was the  right place to do it, without requiring additional checks. However, it seems like there is potential to simplify the code in `visitAND`
> Both visitAND and ReduceLoadWidth contained essentially the same code to generate the new load, so it seems reasonable to me to contain this logic within the sensibly named function. In D39604 I also wish to directly use this function to combine ANDs and hopefully it can more helpful when anyone else wants to do similar.
Ah yes, there is some shared code to generated the new load, I missed initially! `ReduceLoadWidth` also contains a few more legality checks.


https://reviews.llvm.org/D39595