[PATCH] D39575: [X86] Add subtarget features prefer-avx256 and prefer-avx128 and use them to limit vector width presented by TTI

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In the longer term we may end up making -mprefer-avx256 be on by default for skylake-avx256 so I think a vectorizer specific command line option would prevent us from having that control.

Even with this current patch I'm still seeing larger shuffles from the interleave store part of the vectorizer. I think that code was designed to create oversized vectors with the assumption that the backend would legalize it. Not sure if we're going to need to stop the vectorizer from doing that or if we're going to have to teach the backend to split 512-bit shuffles when this flag is on even though the type is "legal".

I'm also seeing gathers with a 8 x i32 type and an 8 x i64 index. I'm suspecting the index is i64 because in IR we need it to match the pointer size, but I'm not sure. I'm hoping some known bits analysis will allow us to narrow this back down in the backend, but if not we may have to split it when -mprefer-avx256 is on.


https://reviews.llvm.org/D39575