[PATCH] D39575: [X86] Add subtarget features prefer-avx256 and prefer-avx128 and use them to limit vector width presented by TTI

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

Copying a note I sent to the dev-list; I assume we should just continue the discussion here now that we have a patch to review:

Why make this an x86-specific "feature" of the target? We already have options like this in LoopVectorize.cpp:

static cl::opt<unsigned> ForceTargetNumVectorRegs(

  "force-target-num-vector-regs", cl::init(0), cl::Hidden,
  cl::desc("A flag that overrides the target's number of vector registers."));

Can we add an equivalent target-independent override for vector width? Any target with >1 potential register width will benefit from having this option for experimentation.


https://reviews.llvm.org/D39575