[PATCH] D39415: [ARMISelLowering] Better handling of NEON load/store for sequential memory regions

[Renato Golin via Phabricator via llvm-commits]

rengolin added a comment.

In https://reviews.llvm.org/D39415#911617, @eastig wrote:

> I'll do AArch32/AArch64 benchmarks runs on our Juno boards. It would be worth to run CTMark to check compilation time.


Hi,

There is no point in testing AArch64 as this is a change to the AArch32 back-end. Can you run the same benchmarks on an ARMv7 board? This is the most likely target on using the ARM back-end.

cheers,
--renato


Repository:
  rL LLVM

https://reviews.llvm.org/D39415