[PATCH] D37775: Add a verifier test to check the access on both sides of COPY are the same

[Zvi Rackover via Phabricator via llvm-commits]

zvi added a comment.

Hi All,

I will try to cover for Igor in helping with the X86 part of this patch.

AFAIU, the challenge is in getting the call/return lowering working for the case where a function's argument/return-value is a f32 or a f64. Some subtargets will use the FP stack registers (which are 80-bit wide), and other will use XMM's (which are 128-bit wide).
Example:

  define float @foo(float %arg1, float %arg2) {
    ret float %arg2
  }

Existing state on ToT: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -stop-after=irtranslator

  body:             |
    bb.1 (%ir-block.0):
      liveins: %xmm0, %xmm1
  
      %0:_(s32) = COPY %xmm0
      %1:_(s32) = COPY %xmm1
      %xmm0 = COPY %1(s32)
      RET 0, implicit %xmm0

Here are some options for resolving this issue:

1. Perform the full expansion in X86CallLowering using G_COPY/G_TRUNC and G_ANYEXT/G_COPY. Fix whatever needs fixing to make it work.
2. X86CallLoweing will continue with generation of G_COPY's with incompatible src/dest bit-sizes, but will assign register classes to the virtual registers. This will technically work because the verification check is guarded by the condition 'SrcTy.isValid() || DstTy.isValid()', which will not be met if final register classes are assigned.
3. Introduce an X86-specific COPY instruction which will be pattern-matched in Instruction-Selection. This instruction will be generated instead of G_COPY's.

I haven't tried implementing any of the above options, and given my limited knowledge in GlobalISel, would appreciate any feedback on this.

Thanks, Zvi


https://reviews.llvm.org/D37775