[PATCH] D38714: [AVX512] Don't mark EXTLOAD as legal with AVX512. Continue using custom lowering.

Elena Demikhovsky via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Oct 14 14:11:06 PDT 2017


delena added inline comments.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:18438
+  // v8i8->v8i64.
+  if (Ext == ISD::EXTLOAD && !Subtarget.hasBWI() && RegVT == MVT::v8i64 &&
+      MemVT == MVT::v8i8)
----------------
Do we have a test for this case? 


================
Comment at: test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll:332
 ; CHECK-NEXT:    kmovw %eax, %k1
-; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} = xmm1[0,2,0,2]
+; CHECK-NEXT:    vbroadcasti32x2 (%rdi), %xmm0 {%k1}
 ; CHECK-NEXT:    retq
----------------
I'm not sure that masked instruction is the best solution. May be  converting it to a shuffle will give better results. Can this sequence be resolved with "pinsertd"?  you are loading two elements, but using only one of them, right?


================
Comment at: test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll:345
 ; CHECK-NEXT:    kmovw %eax, %k1
-; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} {z} = xmm0[0,2,0,2]
+; CHECK-NEXT:    vbroadcasti32x2 (%rdi), %xmm0 {%k1} {z}
 ; CHECK-NEXT:    retq
----------------
load {a0, a1}
%shuf = { a0, a1, a0, a1}
%res = { a0, 0, 0, 0, 0}
- can we do the same with one "vmovd" instruction ?


https://reviews.llvm.org/D38714





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