[llvm] r315183 - [TableGen] Simplify, add range_loop in CodeGenSchedule

[Amara Emerson via llvm-commits]

> @@ -830,16 +830,16 @@ void CodeGenSchedModels::collectProcItin
> void CodeGenSchedModels::collectProcItinRW() {
>   RecVec ItinRWDefs = Records.getAllDerivedDefinitions("ItinRW");
>   std::sort(ItinRWDefs.begin(), ItinRWDefs.end(), LessRecord());
> -  for (RecIter II = ItinRWDefs.begin(), IE = ItinRWDefs.end(); II != IE; ++II) {
> -    if (!(*II)->getValueInit("SchedModel")->isComplete())
> -      PrintFatalError((*II)->getLoc(), "SchedModel is undefined");
> -    Record *ModelDef = (*II)->getValueAsDef("SchedModel");
> +  for (Record *RWDef  : make_range(ItinRWDefs.begin(), ItinRWDefs.end())) {
You don’t need a make_range here.