[PATCH] D37687: [X86][LLVM]Expanding Supports lowerInterleaved{store|load}() in X86InterleavedAccess (VF64 stride 3)

[michael zuckerman via Phabricator via llvm-commits]

m_zuckerman added inline comments.


================
Comment at: lib/Target/X86/X86InterleavedAccess.cpp:479
+
+  for (unsigned i = 32; i < VecElems; ++i)
+    Concat.push_back(i);
----------------
zvi wrote:
> If we reach this point, can VecElems be other than 64?
In theory, yes, but I block all the other cases with the if supported stage so in practice, the answer is no. Do you prefer to add an assertion? 


https://reviews.llvm.org/D37687