[llvm] r313980 - Remove the default clause from a fully-covering switch

Nemanja Ivanovic via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 22 05:26:00 PDT 2017


Author: nemanjai
Date: Fri Sep 22 05:26:00 2017
New Revision: 313980

URL: http://llvm.org/viewvc/llvm-project?rev=313980&view=rev
Log:
Remove the default clause from a fully-covering switch
to appease bots that use a compiler that warns about this
and use -Werror.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=313980&r1=313979&r2=313980&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Fri Sep 22 05:26:00 2017
@@ -2801,11 +2801,11 @@ SDValue PPCDAGToDAGISel::getCompoundZero
 
   // Produce the value that needs to be either zero or sign extended.
   switch (CmpTy) {
-  default: llvm_unreachable("Unknown Zero-comparison type.");
   case ZeroCompare::GEZExt:
   case ZeroCompare::GESExt:
     ToExtend = SDValue(CurDAG->getMachineNode(Is32Bit ? PPC::NOR : PPC::NOR8,
                                               dl, InVT, LHS, LHS), 0);
+    break;
   case ZeroCompare::LEZExt:
   case ZeroCompare::LESExt: {
     if (Is32Bit) {
@@ -2824,22 +2824,24 @@ SDValue PPCDAGToDAGISel::getCompoundZero
       ToExtend = SDValue(CurDAG->getMachineNode(PPC::OR8, dl, MVT::i64,
                                                 Addi, LHS), 0);
     }
+    break;
   }
   }
 
   // For 64-bit sequences, the extensions are the same for the GE/LE cases.
-  if (!Is32Bit && (CmpTy == ZeroCompare::GEZExt || ZeroCompare::LEZExt))
+  if (!Is32Bit &&
+      (CmpTy == ZeroCompare::GEZExt || CmpTy == ZeroCompare::LEZExt))
     return SDValue(CurDAG->getMachineNode(PPC::RLDICL, dl, MVT::i64,
                                           ToExtend, getI64Imm(1, dl),
                                           getI64Imm(63, dl)), 0);
-  if (!Is32Bit && (CmpTy == ZeroCompare::GESExt || ZeroCompare::LESExt))
+  if (!Is32Bit &&
+      (CmpTy == ZeroCompare::GESExt || CmpTy == ZeroCompare::LESExt))
     return SDValue(CurDAG->getMachineNode(PPC::SRADI, dl, MVT::i64, ToExtend,
                                           getI64Imm(63, dl)), 0);
 
   assert(Is32Bit && "Should have handled the 32-bit sequences above.");
   // For 32-bit sequences, the extensions differ between GE/LE cases.
   switch (CmpTy) {
-  default: llvm_unreachable("Unknown Zero-comparison type.");
   case ZeroCompare::GEZExt: {
     SDValue ShiftOps[] =
       { ToExtend, getI32Imm(1, dl), getI32Imm(31, dl), getI32Imm(31, dl) };
@@ -2856,6 +2858,10 @@ SDValue PPCDAGToDAGISel::getCompoundZero
     return SDValue(CurDAG->getMachineNode(PPC::ADDI8, dl, MVT::i64, ToExtend,
                                           getI32Imm(-1, dl)), 0);
   }
+
+  // The above case covers all the enumerators so it can't have a default clause
+  // to avoid compiler warnings.
+  llvm_unreachable("Unknown zero-comparison type.");
 }
 
 /// Produces a zero-extended result of comparing two 32-bit values according to




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