[PATCH] D38146: [AArch64] Fix bug in store of vector 0 DAGCombine.

[Geoff Berry via Phabricator via llvm-commits]

gberry created this revision.
Herald added subscribers: kristof.beyls, eraman, javed.absar, rengolin, aemerson.

Avoid using XZR/WZR directly as operands to split stores of zero
vectors.  Doing so can lead to the XZR/WZR being used by an instruction
that doesn't allow it (e.g. add).

Fixes bug 34674.


https://reviews.llvm.org/D38146

Files:
  lib/Target/AArch64/AArch64ISelLowering.cpp
  test/CodeGen/AArch64/arm64-memset-inline.ll
  test/CodeGen/AArch64/fastcc.ll
  test/CodeGen/AArch64/ldst-opt.ll

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