[PATCH] D37669: [X86][intrinsics] lower _mm[256|512]_mask[z]_set1_epi[8|16|32|64] intrinsic to IR

[jina via Phabricator via llvm-commits]

jina.nahias added inline comments.


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Comment at: test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll:8
+define <8 x i64> @test_mm512_mask_set1_epi8(<8 x i64> %__O, i64 %__M, i8 signext %__A)  {
+; X32-LABEL: test_mm512_mask_set1_epi8:
+; X32:       # BB#0: # %entry
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craig.topper wrote:
> Any idea why this generated such terrible code?
there is a problem with intrinsics that use 64 bit masks (e.g. *epi8) have a sub optimal asm code (hundreds of code lines) on a 32bit machine when running fast-isel flag . working on a solution and updating in another patch.


https://reviews.llvm.org/D37669