[PATCH] D37669: [X86][intrinsics] lower _mm[256|512]_mask[z]_set1_epi[8|16|32|64] intrinsic to IR
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 14 15:15:27 PDT 2017
craig.topper added inline comments.
================
Comment at: test/CodeGen/X86/avx512-intrinsics-upgrade.ll:2
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
----------------
Can you add a 32-bit mode run line here? I want to make sure we handle this well.
================
Comment at: test/CodeGen/X86/avx512-intrinsics-upgrade.ll:54
+; CHECK-NEXT: retq
+ %res = call <8 x i64> @llvm.x86.avx512.mask.pbroadcast.q.mem.512(i64 %x0, <8 x i64> %x1,i8 -1)
+ %res1 = call <8 x i64> @llvm.x86.avx512.mask.pbroadcast.q.mem.512(i64 %x0, <8 x i64> %x1,i8 %mask)
----------------
The pbroadcast.q.mem.512 intrinsic seems to have never worked. We don't need to add a test or autoupgrade for it if that's the case.
================
Comment at: test/CodeGen/X86/avx512-intrinsics.ll:4226
-define <8 x i64>@test_int_x86_avx512_mask_pbroadcastq_gpr_512(i64 %x0, <8 x i64> %x1, i8 %mask) {
-; CHECK-LABEL: test_int_x86_avx512_mask_pbroadcastq_gpr_512:
----------------
We really need a 32-bit run line on this file. This test case throws an unreachable on trunk today.
================
Comment at: test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll:8
+define <8 x i64> @test_mm512_mask_set1_epi8(<8 x i64> %__O, i64 %__M, i8 signext %__A) {
+; X32-LABEL: test_mm512_mask_set1_epi8:
+; X32: # BB#0: # %entry
----------------
Any idea why this generated such terrible code?
https://reviews.llvm.org/D37669
More information about the llvm-commits
mailing list