[PATCH] D37858: [X86] Don't create i64 constants on 32-bit targets when lowering v64i1 constant build vectors

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/Target/X86/X86ISelLowering.cpp:7029
+      Upper = LowerBUILD_VECTORvXi1(Upper, DAG);
+      return DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v64i1, Lower, Upper);
+    }
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craig.topper wrote:
> RKSimon wrote:
> > Not sure if it'll work but can you re-use LowerVectorIntUnary to do this? We seem to have a lot of 'split+2*op+concat' patterns/helpers.
> I think that will also end up calling getNode with a CONCAT_VECTOR of two BUILD_VECTORS. Since extractSubvector knows to look through BUILD_VECTORS.
OK, no worries


https://reviews.llvm.org/D37858