[PATCH] D37858: [X86] Don't create i64 constants on 32-bit targets when lowering v64i1 constant build vectors

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: lib/Target/X86/X86ISelLowering.cpp:7029
+      Upper = LowerBUILD_VECTORvXi1(Upper, DAG);
+      return DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v64i1, Lower, Upper);
+    }
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RKSimon wrote:
> Not sure if it'll work but can you re-use LowerVectorIntUnary to do this? We seem to have a lot of 'split+2*op+concat' patterns/helpers.
I think that will also end up calling getNode with a CONCAT_VECTOR of two BUILD_VECTORS. Since extractSubvector knows to look through BUILD_VECTORS.


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Comment at: test/CodeGen/X86/pr34605.ll:4
+
+ at a = common local_unnamed_addr global [512 x i8] zeroinitializer, align 1
+
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RKSimon wrote:
> Is this used in the test? I couldn't see it.
Removed.


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Comment at: test/CodeGen/X86/pr34605.ll:6
+
+define void @pr34605(i8* nocapture %s, i32 %p, i32 %len) {
+; CHECK-LABEL: pr34605:
----------------
RKSimon wrote:
> Is %len used in the test? I couldn't see it.
Removed


https://reviews.llvm.org/D37858