[PATCH] D37615: [ELF] Implement the relocations of AVR for LLD
Leslie Zhai via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 12 22:12:09 PDT 2017
xiangzhai updated this revision to Diff 114970.
xiangzhai retitled this revision from "[AVR] implement the relocation of LDI and other Instructions for LLD" to "[ELF] Implement the relocations of AVR for LLD".
xiangzhai added a comment.
Dear Rui,
I fixed the issue as you point out.
$ avr-gcc -mmcu=atmega328p -o basic-avr.o -c basic-avr.s
$ avr-readelf -r basic-avr.o
Relocation section '.rela.text' at offset 0xe4 contains 30 entries:
Offset Info Type Sym.Value Sym. Name + Addend
00000000 00000112 R_AVR_CALL 00000000 .text + 2c
00000004 00000105 R_AVR_16_PM 00000000 .text + 2c
00000006 0000011a R_AVR_8 00000000 .text + 2c
00000007 0000011b R_AVR_8_LO8 00000000 .text + 2c
00000008 0000011c R_AVR_8_HI8 00000000 .text + 2c
00000009 0000011d R_AVR_8_HLO8 00000000 .text + 2c
0000000a 00000106 R_AVR_LO8_LDI 00000000 .text + 2c
0000000c 00000107 R_AVR_HI8_LDI 00000000 .text + 2c
0000000e 00000108 R_AVR_HH8_LDI 00000000 .text + 2c
00000010 00000116 R_AVR_MS8_LDI 00000000 .text + 2c
00000012 00000113 R_AVR_LDI 00000000 .text + 2c
00000014 00000109 R_AVR_LO8_LDI_NEG 00000000 .text + 2c
00000016 0000010a R_AVR_HI8_LDI_NEG 00000000 .text + 2c
00000018 0000010b R_AVR_HH8_LDI_NEG 00000000 .text + 2c
0000001a 00000117 R_AVR_MS8_LDI_NEG 00000000 .text + 2c
0000001c 0000010c R_AVR_LO8_LDI_PM 00000000 .text + 2c
0000001e 0000010d R_AVR_HI8_LDI_PM 00000000 .text + 2c
00000020 0000010e R_AVR_HH8_LDI_PM 00000000 .text + 2c
00000022 0000010f R_AVR_LO8_LDI_PM_ 00000000 .text + 2c
00000024 00000110 R_AVR_HI8_LDI_PM_ 00000000 .text + 2c
00000026 00000111 R_AVR_HH8_LDI_PM_ 00000000 .text + 2c
00000028 00000102 R_AVR_7_PCREL 00000000 .text + 2c
0000002a 00000103 R_AVR_13_PCREL 00000000 .text + 2c
00000034 00000114 R_AVR_6 00000000 .text + 2c
00000038 00000104 R_AVR_16 00000000 .text + 2c
0000003a 00000118 R_AVR_LO8_LDI_GS 00000000 .text + 2c
0000003c 00000119 R_AVR_HI8_LDI_GS 00000000 .text + 2c
0000003e 00000122 R_AVR_PORT6 00000000 .text + 2d
00000040 00000123 R_AVR_PORT5 00000000 .text + 0
00000042 00000115 R_AVR_6_ADIW 00000000 .text + 2c
Link high address *not* zero:
`
$ avr-ld -o basic-avr basic-avr.o -Ttext=6
$ avr-objdump -d basic-avr
basic-avr: file format elf32-avr
Disassembly of section .text:
00000006 <__ctors_end>:
6: 0e 94 19 00 call 0x32 ; 0x32 <foo>
a: 19 00 .word 0x0019 ; ????
c: 32 32 cpi r19, 0x22 ; 34
e: 00 00 nop
10: 02 e3 ldi r16, 0x32 ; 50
12: 10 e0 ldi r17, 0x00 ; 0
14: 20 e0 ldi r18, 0x00 ; 0
16: 30 e0 ldi r19, 0x00 ; 0
18: 42 e3 ldi r20, 0x32 ; 50
1a: 5e ec ldi r21, 0xCE ; 206
1c: 6f ef ldi r22, 0xFF ; 255
1e: 7f ef ldi r23, 0xFF ; 255
20: 8f ef ldi r24, 0xFF ; 255
22: 99 e1 ldi r25, 0x19 ; 25
24: a0 e0 ldi r26, 0x00 ; 0
26: b0 e0 ldi r27, 0x00 ; 0
28: c7 ee ldi r28, 0xE7 ; 231
2a: df ef ldi r29, 0xFF ; 255
2c: ef ef ldi r30, 0xFF ; 255
2e: 09 f4 brne .+2 ; 0x32 <foo>
30: 00 c0 rjmp .+0 ; 0x32 <foo>
00000032 <foo>:
32: 2a 80 ldd r2, Y+2 ; 0x02
34: 08 80 ld r0, Y
36: 94 84 ldd r9, Z+12 ; 0x0c
38: 76 8c ldd r7, Z+30 ; 0x1e
3a: 92 a8 ldd r9, Z+50 ; 0x32
3c: 00 91 32 00 lds r16, 0x0032 ; 0x800032 <__EEPROM_REGION_LENGTH__+0x7f0032>
40: 29 e1 ldi r18, 0x19 ; 25
42: 30 e0 ldi r19, 0x00 ; 0
44: 43 b7 in r20, 0x33 ; 51
46: 30 9a sbi 0x06, 0 ; 6
48: f2 96 adiw r30, 0x32 ; 50
it equals to LLD:
$ llvm/build/bin/ld.lld -o basic-avr-lld basic-avr.o -Ttext=6
$ avr-objdump -d basic-avr-lld
basic-avr-lld: file format elf32-avr
Disassembly of section .text:
00000006 <main>:
6: 0e 94 19 00 call 0x32 ; 0x32 <foo>
a: 19 00 .word 0x0019 ; ????
c: 32 32 cpi r19, 0x22 ; 34
e: 00 00 nop
10: 02 e3 ldi r16, 0x32 ; 50
12: 10 e0 ldi r17, 0x00 ; 0
14: 20 e0 ldi r18, 0x00 ; 0
16: 30 e0 ldi r19, 0x00 ; 0
18: 42 e3 ldi r20, 0x32 ; 50
1a: 5e ec ldi r21, 0xCE ; 206
1c: 6f ef ldi r22, 0xFF ; 255
1e: 7f ef ldi r23, 0xFF ; 255
20: 8f ef ldi r24, 0xFF ; 255
22: 99 e1 ldi r25, 0x19 ; 25
24: a0 e0 ldi r26, 0x00 ; 0
26: b0 e0 ldi r27, 0x00 ; 0
28: c7 ee ldi r28, 0xE7 ; 231
2a: df ef ldi r29, 0xFF ; 255
2c: ef ef ldi r30, 0xFF ; 255
2e: 09 f4 brne .+2 ; 0x32 <foo>
30: 00 c0 rjmp .+0 ; 0x32 <foo>
00000032 <foo>:
32: 2a 80 ldd r2, Y+2 ; 0x02
34: 08 80 ld r0, Y
36: 94 84 ldd r9, Z+12 ; 0x0c
38: 76 8c ldd r7, Z+30 ; 0x1e
3a: 92 a8 ldd r9, Z+50 ; 0x32
3c: 00 91 32 00 lds r16, 0x0032 ; 0x800032 <foo+0x800000>
40: 29 e1 ldi r18, 0x19 ; 25
42: 30 e0 ldi r19, 0x00 ; 0
44: 43 b7 in r20, 0x33 ; 51
46: 30 9a sbi 0x06, 0 ; 6
48: f2 96 adiw r30, 0x32 ; 50
Regards,
Leslie Zhai
Repository:
rL LLVM
https://reviews.llvm.org/D37615
Files:
ELF/Arch/AVR.cpp
test/ELF/basic-avr.s
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