[PATCH] D37751: [X86 CodeGen] Optimization of ZeroExtendLoad for v2i8 vector

[Elena Demikhovsky via Phabricator via llvm-commits]

delena created this revision.

Load with zero-extend and sign-extend from v2i8 to v2i32 is "Legal" since SSE4.1 and may be performed using PMOVZXBD , PMOVSXBD instructions.

The sequence that we have in conversion in uitofp_load_2i8_to_2f64() is better, than it was, but still sub-optimal. I'll open a separate bug for it.


Repository:
  rL LLVM

https://reviews.llvm.org/D37751

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/vec_int_to_fp.ll
  test/CodeGen/X86/vector-sext.ll
  test/CodeGen/X86/vector-zext.ll

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