[PATCH] D36849: [AMDGPU] Port of HSAIL inliner

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: lib/Target/AMDGPU/AMDGPUInline.cpp:180-182
+  size_t Size = Caller->size() + Callee->size() - 1;
+  if (MaxBB && Size > MaxBB)
+    return InlineCost::getNever();
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arsenm wrote:
> rampitec wrote:
> > arsenm wrote:
> > > This heuristic doesn't make any sense to me. Why does the block count matter? Just use the default cost.
> > That is to prevent huge compilation time of some programs. Not an ideal heuristic, but better than nothing.
> Compilation time from what? That it requires this custom wrapper function checking sounds like additional motivation to drop it.
The actual testcase which required that was VRay AFAIR. When we increase inline threshold (or inline everything like now) we a vulnerable to extremely high compilation times for huge codes. In case of VRay it was hours, and this has decreased it to minutes.


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Comment at: lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h:165-166
                            const Function *Callee) const;
+
+  unsigned getInliningThresholdMultiplier() { return 9; }
 };
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arsenm wrote:
> How did you decide 9 for this?
This is the rounded ratio of standard inline threshold and that tuned for HSAIL. Later we will need to retune.


https://reviews.llvm.org/D36849