[PATCH] D29933: [RISCV 11/n] Initial codegen support for ALU operations
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 7 03:36:35 PDT 2017
asb marked 3 inline comments as done.
asb added inline comments.
================
Comment at: lib/Target/RISCV/RISCVISelLowering.cpp:66
+ SelectionDAG &DAG) const {
+ switch (Op.getOpcode()) {
+ default:
----------------
mgrang wrote:
> This currently will always report error. I guess you intend to add more cases in future?
Given this is a patch series, I tend to prefer to leave the 'scaffolding' for future patches to build upon. The next patch in this series starts to flesh out LowerOperation.
https://reviews.llvm.org/D29933
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