[PATCH] D37514: [PowerPC] DAGCombine for better exploitation of rotate-and-mask instruction

[Hal Finkel via Phabricator via llvm-commits]

hfinkel added a comment.

I'd prefer that we extend tryBitPermutation to look through the zext. I realize this means adding code there to deal with mismatched input/output bit widths, but that seems much less fragile, and potentially more useful, than this.

I have a particular fear of doing this kinds of transformations as target-specific DAGCombines: The output pattern could be anti-canonical, or could become so in the future, and if that's in any case true, then you'll cause the optimizer to hang while DAGCombine and the target fight each other. I also don't like when one piece of code is guessing what another piece will do. Sometimes this is unavoidable (e.g., the vectorizer guesses what the register allocator will do), but these two pieces of code are essentially at the same level, so there's no need. As a result, I'd recommend against solving the problem this way.


https://reviews.llvm.org/D37514