[PATCH] D37211: [PowerPC] eliminate redundant compare instruction
Hal Finkel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 4 09:34:45 PDT 2017
hfinkel accepted this revision.
hfinkel added a comment.
This revision is now accepted and ready to land.
One comment below about BCCLR, but otherwise, this LGTM.
================
Comment at: lib/Target/PowerPC/PPCMIPeephole.cpp:436
+ BII != BB.instr_end() &&
+ (*BII).getOpcode() == PPC::BCC &&
+ (*BII).getOperand(1).isReg()) {
----------------
inouehrs wrote:
> hfinkel wrote:
> > I think you can also handle BCCLR and BCA. BCA doesn't come up much, but we can have BCCLR in loops where this might be helpful.
> I added PPC::BCCLR as a opcode to optimize. Also I added a test case that generates bgelr.
> (In many case, BCCLR is not used at the time of PPC MI Peephole since BCCLR is typically generated afterward at If Converter.)
Ah, you're right. Those won't ever appear until later in the pipeline. I don't want dead code here. Please remove the check for BCCLR, in that case, and instead add a comment. Maybe something like:
// We check only for BCC here, not BCCLR, because BCCLR will be formed only later in the pipeline.
This way, if we ever change how this is done, someone will grep for BCCLR and find this. Thanks for adding the test case.
https://reviews.llvm.org/D37211
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