[PATCH] D34160: [Power9] Exploit vinserth instruction

[Graham Yiu via Phabricator via llvm-commits]

gyiu added a comment.

Note that I was able to re-implement Nemanja's suggestion of generalizing the case when both inputs are the same vector because the registers used in code-gen are now consistent.  Not sure if it was a real problem that I saw previously, or a transient issue that was fixed with newer levels of LLVM.


Repository:
  rL LLVM

https://reviews.llvm.org/D34160