[PATCH] D37102: [AArch64] Add FMOVH0: materialize 0 using zero register for f16 values

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer updated this revision to Diff 112536.
SjoerdMeijer added a comment.

Added test case.


https://reviews.llvm.org/D37102

Files:
  lib/Target/AArch64/AArch64AsmPrinter.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64InstrInfo.cpp
  lib/Target/AArch64/AArch64InstrInfo.td
  test/CodeGen/AArch64/f16-imm.ll

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