[PATCH] D37051: Model cache size and associativity in TargetTransformInfo
Roman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 24 00:37:32 PDT 2017
gareevroman added a comment.
In https://reviews.llvm.org/D37051#850439, @grosser wrote:
> In https://reviews.llvm.org/D37051#849798, @gareevroman wrote:
>
> > > I think throughput and latency of vector fma instructions are pretty constant across micro-architectures too. Can we also add them?
> >
> > Sorry, probably, it’d require to specify it for each architecture.
>
>
> We could do this. Some of the backend experts might be able to help you how to do this best. I think we should do this in a separate patch. Care to propose one?
Yes, I will propose it. Sometimes it can be difficult to find this information, since it's not always publicly available.
https://reviews.llvm.org/D37051
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