[PATCH] D37088: [x86] NFC: More refactoring to pave the way to extending this ISel logic to handle other x86 pseudos that carry flags and thus can't be matched by our ISel patterns with fused memory accesses.

[Chandler Carruth via Phabricator via llvm-commits]

chandlerc marked an inline comment as done.
chandlerc added a comment.

In https://reviews.llvm.org/D37088#850990, @craig.topper wrote:

> Is your first version going to handle just registers or immediates too/


Not sure, haven't gotten there. Just carving off cleanups where I can.



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Comment at: lib/Target/X86/X86ISelDAGToDAG.cpp:1959
+  case X86ISD::DEC:
+    return SelectSize({{MVT::i64, X86::DEC64m},
+                       {MVT::i32, X86::DEC32m},
----------------
craig.topper wrote:
> Any real reason to pass the load sizes with this? Could we just define an order and just map the types to an index without a loop. Feels like the types starting getting repetitive if we extend this to ADD/SUB/AND/OR/XOR/ADC/SBB which all have this problem.
Good question. I went back and forth. My concern about just defining the order is getting it wrong. But honestly, I think that's not such an issue. I'll go back to hard coding the 4 integer types. We can make something fancier when we actually need it if that day ever arrives.


https://reviews.llvm.org/D37088