[PATCH] D36597: DAG: Fix creating select with wrong condition type

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 10 16:26:02 PDT 2017


arsenm created this revision.
Herald added subscribers: tpr, nhaehnle, wdng.

This code added in r297930 assumed that it could create
a select with a condition type that is just an integer
bitcast of the selected type. For AMDGPU any vselect is
going to be scalarized (although the vector types are legal),
and all select conditions must be i1 (the same as getSetCCResultType).

      

This logic doesn't really make sense to me, but there's
never really been a consistent policy in what the select
condition mask type is supposed to be. Try to extend
the logic for skipping the transform for condition types
that aren't setccs. It doesn't seem quite right to me though,
but checking conditions that seem more sensible (like whether the
vselect is going to be expanded) doesn't work since this
seems to depend on that also.


https://reviews.llvm.org/D36597

Files:
  lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
  test/CodeGen/X86/avx512-vselect.ll

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