[PATCH] D31615: AMDGPU: Add way to specify that instructions zero high 16-bits

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 3 18:53:57 PDT 2017


rampitec added inline comments.


================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:4549
+    if (Def->getDesc().OpInfo[0].OperandType == AMDGPU::OPERAND_REG_DEF16) {
+      // FIXME: This isn't true for all instructions on gfx9, where some new
+      // instructions default to leaving high bits intact and there is a control
----------------
Given that fixme, can we produce these instructions now? If yes, this code is dangerous.


https://reviews.llvm.org/D31615





More information about the llvm-commits mailing list