[PATCH] D35874: [MIPS] Implement support for -mstack-alignment.

Simon Dardis via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 3 04:27:46 PDT 2017


sdardis added a comment.

In https://reviews.llvm.org/D35874#821062, @bsdjhb wrote:

>   If it is possible to come up with IR that when assembled results in 'daddui sp,sp,-48' when assembled normally, then we could have a test to verify it uses '-64' when -mstack-alignment=32 is used and -48 otherwise.


See test/CodeGen/Mips/stack-alignment.ll, you'll need to modify that to accept whatever option is produced by -mstack-alignment.



================
Comment at: lib/Target/Mips/MipsSubtarget.cpp:164
+    stackAlignment = StackAlignOverride;
+  else if (hasMips64())
+    stackAlignment = 16;
----------------
That looks incorrect. Instead, if the ABI is N32 or N64, then the stack alignment is 16, otherwise of O32 it is 8.

At least according to GCC and the documentation I have to hand.

Can you split this patch into two parts, the first one that fixes the bug and the second which implements this new feature?


Repository:
  rL LLVM

https://reviews.llvm.org/D35874





More information about the llvm-commits mailing list