[PATCH] D35302: [IRCE] Recognize loops with unsigned latch conditions

Anna Thomas via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 2 06:50:22 PDT 2017


anna requested changes to this revision.
anna added a comment.
This revision now requires changes to proceed.

Looks almost ready to go. Some comments regarding additional tests.



================
Comment at: lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp:1228
   B.SetInsertPoint(LS.LatchBr);
-  Value *TakeBackedgeLoopCond =
-      Increasing ? B.CreateICmpSLT(LS.IndVarNext, ExitSubloopAt)
-                 : B.CreateICmpSGT(LS.IndVarNext, ExitSubloopAt);
+  Value *TakeBackedgeLoopCond;
+  if (Increasing)
----------------
Nit: set to nullptr.


================
Comment at: lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp:1248
   // exit.
-  Value *IterationsLeft = Increasing
-                              ? B.CreateICmpSLT(LS.IndVarNext, LS.LoopExitAt)
-                              : B.CreateICmpSGT(LS.IndVarNext, LS.LoopExitAt);
+  Value *IterationsLeft;
+  if (Increasing)
----------------
set to nullptr.


================
Comment at: test/Transforms/IRCE/unsigned_comparisons_ugt.ll:9
+; CHECK: irce: in function test_06: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
+
+; UGT condition for increasing loop.
----------------
Please add some tests or checks for post loops as well. That code's not tested here.


================
Comment at: test/Transforms/IRCE/unsigned_comparisons_ult.ll:10
+; CHECK-NOT: irce: in function test_07: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
+
+; ULT condition for increasing loop.
----------------
Please add some tests or checks for post loops as well. That code's not tested here.


https://reviews.llvm.org/D35302





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