[PATCH] D36094: [globalisel][tablegen] Do not merge memoperands from instructions that weren't in the match.

[Daniel Sanders via Phabricator via llvm-commits]

dsanders added a comment.

In https://reviews.llvm.org/D36094#828809, @fhahn wrote:

> I'll commit https://reviews.llvm.org/D36151 after this one goes in, so we see if this change fixes the buildbot


Thanks. I'll commit it soon, I'm just re-running 'ninja check' at the moment.



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Comment at: include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h:377
+      int64_t MergeInsnID = -1;
+      while ((MergeInsnID = MatchTable[CurrentIdx++]) != -1) {
+        DEBUG(dbgs() << ", MIs[" << MergeInsnID << "]");
----------------
fhahn wrote:
> Does this mean that now we are advancing CurrentIdx till the end? Could this have an impact on further actions after GIR_MergeMemOperands?
Until the end of the variable-length MergeInsnID list which is indicated with a -1. After breaking out of this loop, CurrentIdx will be the index for the next GIR_* opcode.


https://reviews.llvm.org/D36094