[PATCH] D35568: [AArch64] Use 16 bytes as preferred function alignment on Cortex-A53.

[Florian Hahn via Phabricator via llvm-commits]

fhahn added a comment.

Thanks Renato. Yes aligning the function start at 16 byte boundaries is for maximum fetch performance. To quote from the A57 Optimization Guide:

>   Consider aligning subroutine entry points and branch targets to quadword boundaries, within the bounds of the code-density requirements of the program. This will ensure that the subsequent fetch can retrieve four (or a full quadword’s worth of) instructions, maximizing fetch bandwidth following the taken branch.

For Cortex-A53, 8byte alignment may be enough, I'll run the same set of benchmarks with 8 byte alignment.


https://reviews.llvm.org/D35568